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iib.htm
Enumerations
IibList
Instruction handlers
IibHandlers

IibHandlers
assemble Intel Fused Multiply-Add (FMA) instructions.
For handlers of AMD Fused Multiply-Add (FMA) instructions see source iia.htm.
See also
IiHandlers, [IntelAVX512].

Available Intel FMA instructions
OperationVectorPrecisionMnemonicOpcode
MADD 132
+Op1×Op3+Op2
Packed SingleVFMADD132PS0x98
DoubleVFMADD132PD
Scalar SingleVFMADD132SS0x99
DoubleVFMADD132SD
MADD 312
+Op3×Op1+Op2
Packed SingleVFMADD312PS0x98
DoubleVFMADD312PD
Scalar SingleVFMADD312SS0x99
DoubleVFMADD312SD
MADD 213
+Op2×Op1+Op3
Packed SingleVFMADD213PS0xA8
DoubleVFMADD213PD
Scalar SingleVFMADD213SS0xA9
DoubleVFMADD213SD
MADD 123
+Op1×Op2+Op3
Packed SingleVFMADD123PS0xA8
DoubleVFMADD123PD
Scalar SingleVFMADD123SS0xA9
DoubleVFMADD123SD
MADD 231
+Op2×Op3+Op1
Packed SingleVFMADD231PS0xB8
DoubleVFMADD231PD
Scalar SingleVFMADD231SS0xB9
DoubleVFMADD231SD
MADD 321
+Op3×Op2+Op1
Packed SingleVFMADD321PS0xB8
DoubleVFMADD321PD
Scalar SingleVFMADD321SS0xB9
DoubleVFMADD321SD
MSUB 132
+Op1×Op3-Op2
Packed SingleVFMSUB132PS0x9A
DoubleVFMSUB132PD
Scalar SingleVFMSUB132SS0x9B
DoubleVFMSUB132SD
MSUB 312
+Op3×Op1-Op2
Packed SingleVFMSUB312PS0x9A
DoubleVFMSUB312PD
Scalar SingleVFMSUB312SS0x9B
DoubleVFMSUB312SD
MSUB 213
+Op2×Op1-Op3
Packed SingleVFMSUB213PS0xAA
DoubleVFMSUB213PD
Scalar SingleVFMSUB213SS0xAB
DoubleVFMSUB213SD
MSUB 123
+Op1×Op2-Op3
Packed SingleVFMSUB123PS0xAA
DoubleVFMSUB123PD
Scalar SingleVFMSUB123SS0xAB
DoubleVFMSUB123SD
MSUB 231
+Op2×Op3-Op1
Packed SingleVFMSUB231PS0xBA
DoubleVFMSUB231PD
Scalar SingleVFMSUB231SS0xBB
DoubleVFMSUB231SD
MSUB 321
+Op3×Op2-Op1
Packed SingleVFMSUB321PS0xBA
DoubleVFMSUB321PD
Scalar SingleVFMSUB321SS0xBB
DoubleVFMSUB321SD
NMADD 132
-Op1×Op3+Op2
Packed SingleVFNMADD132PS0x9C
DoubleVFNMADD132PD
Scalar SingleVFNMADD132SS0x9D
DoubleVFNMADD132SD
NMADD 312
-Op3×Op1+Op2
Packed SingleVFNMADD312PS0x9C
DoubleVFNMADD312PD
Scalar SingleVFNMADD312SS0x9D
DoubleVFNMADD312SD
NMADD 213
-Op2×Op1+Op3
Packed SingleVFNMADD213PS0xAC
DoubleVFNMADD213PD
Scalar SingleVFNMADD213SS0xAD
DoubleVFNMADD213SD
NMADD 123
-Op1×Op2+Op3
Packed SingleVFNMADD123PS0xAC
DoubleVFNMADD123PD
Scalar SingleVFNMADD123SS0xAD
DoubleVFNMADD123SD
NMADD 231
-Op2×Op3+Op1
Packed SingleVFNMADD231PS0xBC
DoubleVFNMADD231PD
Scalar SingleVFNMADD231SS0xBD
DoubleVFNMADD231SD
NMADD 321
-Op3×Op2+Op1
Packed SingleVFNMADD321PS0xBC
DoubleVFNMADD321PD
Scalar SingleVFNMADD321SS0xBD
DoubleVFNMADD321SD
NMSUB 132
-Op1×Op3-Op2
Packed SingleVFNMSUB132PS0x9E
DoubleVFNMSUB132PD
Scalar SingleVFNMSUB132SS0x9F
DoubleVFNMSUB132SD
NMSUB 312
-Op3×Op1-Op2
Packed SingleVFNMSUB312PS0x9E
DoubleVFNMSUB312PD
Scalar SingleVFNMSUB312SS0x9F
DoubleVFNMSUB312SD
NMSUB 213
-Op2×Op1-Op3
Packed SingleVFNMSUB213PS0xAE
DoubleVFNMSUB213PD
Scalar SingleVFNMSUB213SS0xAF
DoubleVFNMSUB213SD
NMSUB 123
-Op1×Op2-Op3
Packed SingleVFNMSUB123PS0xAE
DoubleVFNMSUB123PD
Scalar SingleVFNMSUB123SS0xAF
DoubleVFNMSUB123SD
NMSUB 231
-Op2×Op3-Op1
Packed SingleVFNMSUB231PS0xBE
DoubleVFNMSUB231PD
Scalar SingleVFNMSUB231SS0xBF
DoubleVFNMSUB231SD
NMSUB 321
-Op3×Op2-Op1
Packed SingleVFNMSUB321PS0xBE
DoubleVFNMSUB321PD
Scalar SingleVFNMSUB321SS0xBF
DoubleVFNMSUB321SD
MADDSUB 132
+Op1×Op3±Op2
Packed SingleVFMADDSUB132PS0x96
DoubleVFMADDSUB132PD
MADDSUB 312
+Op3×Op1±Op2
Packed SingleVFMADDSUB312PS0x96
DoubleVFMADDSUB312PD
MADDSUB 213
+Op2×Op1±Op3
Packed SingleVFMADDSUB213PS0xA6
DoubleVFMADDSUB213PD
MADDSUB 123
+Op1×Op2±Op3
Packed SingleVFMADDSUB123PS0xA6
DoubleVFMADDSUB123PD
MADDSUB 231
+Op2×Op3±Op1
Packed SingleVFMADDSUB231PS0xB6
DoubleVFMADDSUB231PD
MADDSUB 321
+Op3×Op2±Op1
Packed SingleVFMADDSUB321PS0xB6
DoubleVFMADDSUB321PD
MSUBADD 132
+Op1×Op3∓Op2
Packed SingleVFMSUBADD132PS0x97
DoubleVFMSUBADD132PD
MSUBADD 312
+Op3×Op1∓Op2
Packed SingleVFMSUBADD312PS0x97
DoubleVFMSUBADD312PD
MSUBADD 213
+Op2×Op1∓Op3
Packed SingleVFMSUBADD213PS0xA7
DoubleVFMSUBADD213PD
MSUBADD 123
+Op1×Op2∓Op3
Packed SingleVFMSUBADD123PS0xA7
DoubleVFMSUBADD123PD
MSUBADD 231
+Op2×Op3∓Op1
Packed SingleVFMSUBADD231PS0xB7
DoubleVFMSUBADD231PD
MSUBADD 321
+Op3×Op2∓Op1
Packed SingleVFMSUBADD321PS0xB7
DoubleVFMSUBADD321PD

iib PROGRAM FORMAT=COFF,MODEL=FLAT,WIDTH=32
 INCLUDEHEAD "euroasm.htm" ; Interface (structures, symbols and macros) of other modules.
INCLUDEHEAD  \  ; Include headers of another modules used in this module.
ea.htm,      \
eaopt.htm,   \
exp.htm,     \
ii.htm,      \
msg.htm,     \
pgm.htm,     \
pgmopt.htm,  \
sss.htm,     \
stm.htm,     \
sym.htm,     \
syswin.htm,  \
;;
iib HEAD ; Start of module interface.
↑ %IibList
enumerates machine instructions of this family which €ASM can assemble.
Each instruction declared in %IibList requires the corresponding handler in this file.
See also
DictLookupIi
%IibList %SET \
VFMADD123PD, \
VFMADD123PS, \
VFMADD123SD, \
VFMADD123SS, \
VFMADD132PD, \
VFMADD132PS, \
VFMADD132SD, \
VFMADD132SS, \
VFMADD213PD, \
VFMADD213PS, \
VFMADD213SD, \
VFMADD213SS, \
VFMADD231PD, \
VFMADD231PS, \
VFMADD231SD, \
VFMADD231SS, \
VFMADD312PD, \
VFMADD312PS, \
VFMADD312SD, \
VFMADD312SS, \
VFMADD321PD, \
VFMADD321PS, \
VFMADD321SD, \
VFMADD321SS, \
VFMADDSUB123PD, \
VFMADDSUB123PS, \
VFMADDSUB132PD, \
VFMADDSUB132PS, \
VFMADDSUB213PD, \
VFMADDSUB213PS, \
VFMADDSUB231PD, \
VFMADDSUB231PS, \
VFMADDSUB312PD, \
VFMADDSUB312PS, \
VFMADDSUB321PD, \
VFMADDSUB321PS, \
VFMSUB123PD, \
VFMSUB123PS, \
VFMSUB123SD, \
VFMSUB123SS, \
VFMSUB132PD, \
VFMSUB132PS, \
VFMSUB132SD, \
VFMSUB132SS, \
VFMSUB213PD, \
VFMSUB213PS, \
VFMSUB213SD, \
VFMSUB213SS, \
VFMSUB231PD, \
VFMSUB231PS, \
VFMSUB231SD, \
VFMSUB231SS, \
VFMSUB312PD, \
VFMSUB312PS, \
VFMSUB312SD, \
VFMSUB312SS, \
VFMSUB321PD, \
VFMSUB321PS, \
VFMSUB321SD, \
VFMSUB321SS, \
VFMSUBADD123PD, \
VFMSUBADD123PS, \
VFMSUBADD132PD, \
VFMSUBADD132PS, \
VFMSUBADD213PD, \
VFMSUBADD213PS, \
VFMSUBADD231PD, \
VFMSUBADD231PS, \
VFMSUBADD312PD, \
VFMSUBADD312PS, \
VFMSUBADD321PD, \
VFMSUBADD321PS, \
VFNMADD123PD, \
VFNMADD123PS, \
VFNMADD123SD, \
VFNMADD123SS, \
VFNMADD132PD, \
VFNMADD132PS, \
VFNMADD132SD, \
VFNMADD132SS, \
VFNMADD213PD, \
VFNMADD213PS, \
VFNMADD213SD, \
VFNMADD213SS, \
VFNMADD231PD, \
VFNMADD231PS, \
VFNMADD231SD, \
VFNMADD231SS, \
VFNMADD312PD, \
VFNMADD312PS, \
VFNMADD312SD, \
VFNMADD312SS, \
VFNMADD321PD, \
VFNMADD321PS, \
VFNMADD321SD, \
VFNMADD321SS, \
VFNMSUB123PD, \
VFNMSUB123PS, \
VFNMSUB123SD, \
VFNMSUB123SS, \
VFNMSUB132PD, \
VFNMSUB132PS, \
VFNMSUB132SD, \
VFNMSUB132SS, \
VFNMSUB213PD, \
VFNMSUB213PS, \
VFNMSUB213SD, \
VFNMSUB213SS, \
VFNMSUB231PD, \
VFNMSUB231PS, \
VFNMSUB231SD, \
VFNMSUB231SS, \
VFNMSUB312PD, \
VFNMSUB312PS, \
VFNMSUB312SD, \
VFNMSUB312SS, \
VFNMSUB321PD, \
VFNMSUB321PS, \
VFNMSUB321SD, \
VFNMSUB321SS, \

;
  ENDHEAD iib ; End of module interface.
↑ VFMADD132SS
Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
Description
VFMADD132SS
Intel reference
VFMADD132SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 99 /r
VFMADD132SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 99 /r
Opcode
0x99
Tested by
t5400
IibVFMADD132SS:: PROC
    IiEmitOpcode 0x99
.op:IiAllowModifier MASK
    IiRequire FMA
    IiDisp8EVEX T1S32
    IiOpEn RVM
    IiModRM /r
    IiEncoding DATA=DWORD
    IiDispatchFormat  xmm.xmm.xmm, xmm.xmm.mem
.xmm.xmm.xmm:
    IiAllowModifier ROUND
.xmm.xmm.mem:
    IiEmitPrefix VEX.DDS.LIG.66.0F38.W0, EVEX.DDS.LIG.66.0F38.W0
    RET
  ENDP IibVFMADD132SS::
↑ VFMADD312SS
Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
Intel reference
VFMADD312SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 99 /r
VFMADD312SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 99 /r
Opcode
0x99
Tested by
t5401
IibVFMADD312SS:: PROC
    JMP IibVFMADD132SS:
  ENDP IibVFMADD312SS::
↑ VFMADD213SS
Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
Description
VFMADD213SS
Intel reference
VFMADD213SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 A9 /r
VFMADD213SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 A9 /r
Opcode
0xA9
Tested by
t5400
IibVFMADD213SS:: PROC
    IiEmitOpcode 0xA9
    JMP IibVFMADD132SS.op:
  ENDP IibVFMADD213SS::
↑ VFMADD123SS
Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
Intel reference
VFMADD123SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 A9 /r
VFMADD123SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 A9 /r
Opcode
0xA9
Tested by
t5401
IibVFMADD123SS:: PROC
    JMP IibVFMADD213SS:
  ENDP IibVFMADD123SS::
↑ VFMADD231SS
Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
Description
VFMADD231SS
Intel reference
VFMADD231SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 B9 /r
VFMADD231SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 B9 /r
Opcode
0xB9
Tested by
t5400
IibVFMADD231SS:: PROC
    IiEmitOpcode 0xB9
    JMP IibVFMADD132SS.op:
  ENDP IibVFMADD231SS::
↑ VFMADD321SS
Fused Multiply-Add of Scalar Single-Precision Floating-Point Values
Intel reference
VFMADD321SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 B9 /r
VFMADD321SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 B9 /r
Opcode
0xB9
Tested by
t5401
IibVFMADD321SS:: PROC
    JMP IibVFMADD231SS:
  ENDP IibVFMADD321SS::
↑ VFMSUB132SS
Fused Multiply-Subtract of Scalar Single- Precision Floating-Point Values
Description
VFMSUB132SS
Intel reference
VFMSUB132SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 9B /r
VFMSUB132SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 9B /r
Opcode
0x9B
Tested by
t5400
IibVFMSUB132SS:: PROC
    IiEmitOpcode 0x9B
    JMP IibVFMADD132SS.op:
  ENDP IibVFMSUB132SS::
↑ VFMSUB312SS
Fused Multiply-Subtract of Scalar Single- Precision Floating-Point Values
Intel reference
VFMSUB312SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 9B /r
VFMSUB312SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 9B /r
Opcode
0x9B
Tested by
t5401
IibVFMSUB312SS:: PROC
    JMP IibVFMSUB132SS:
  ENDP IibVFMSUB312SS::
↑ VFMSUB213SS
Fused Multiply-Subtract of Scalar Single- Precision Floating-Point Values
Description
VFMSUB213SS
Intel reference
VFMSUB213SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 AB /r
VFMSUB213SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 AB /r
Opcode
0xAB
Tested by
t5400
IibVFMSUB213SS:: PROC
    IiEmitOpcode 0xAB
    JMP IibVFMADD132SS.op:
  ENDP IibVFMSUB213SS::
↑ VFMSUB123SS
Fused Multiply-Subtract of Scalar Single- Precision Floating-Point Values
Intel reference
VFMSUB123SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 AB /r
VFMSUB123SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 AB /r
Opcode
0xAB
Tested by
t5401
IibVFMSUB123SS:: PROC
    JMP IibVFMSUB213SS:
  ENDP IibVFMSUB123SS::
↑ VFMSUB231SS
Fused Multiply-Subtract of Scalar Single- Precision Floating-Point Values
Description
VFMSUB231SS
Intel reference
VFMSUB231SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 BB /r
VFMSUB231SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 BB /r
Opcode
0xBB
Tested by
t5400
IibVFMSUB231SS:: PROC
    IiEmitOpcode 0xBB
    JMP IibVFMADD132SS.op:
  ENDP IibVFMSUB231SS::
↑ VFMSUB321SS
Fused Multiply-Subtract of Scalar Single- Precision Floating-Point Values
Intel reference
VFMSUB321SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 BB /r
VFMSUB321SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 BB /r
Opcode
0xBB
Tested by
t5401
IibVFMSUB321SS:: PROC
    JMP IibVFMSUB231SS:
  ENDP IibVFMSUB321SS::
↑ VFNMADD132SS
Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
Description
VFNMADD132SS
Intel reference
VFNMADD132SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 9D /r
VFNMADD132SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 9D /r
Opcode
0x9D
Tested by
t5402
IibVFNMADD132SS:: PROC
    IiEmitOpcode 0x9D
    JMP IibVFMADD132SS.op:
  ENDP IibVFNMADD132SS::
↑ VFNMADD312SS
Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
Intel reference
VFNMADD312SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 9D /r
VFNMADD312SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 9D /r
Opcode
0x9D
Tested by
t5403
IibVFNMADD312SS:: PROC
    JMP IibVFNMADD132SS:
  ENDP IibVFNMADD312SS::
↑ VFNMADD213SS
Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
Description
VFNMADD213SS
Intel reference
VFNMADD213SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 AD /r
VFNMADD213SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 AD /r
Opcode
0xAD
Tested by
t5402
IibVFNMADD213SS:: PROC
    IiEmitOpcode 0xAD
    JMP IibVFMADD132SS.op:
  ENDP IibVFNMADD213SS::
↑ VFNMADD123SS
Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
Intel reference
VFNMADD123SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 AD /r
VFNMADD123SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 AD /r
Opcode
0xAD
Tested by
t5403
IibVFNMADD123SS:: PROC
    JMP IibVFNMADD213SS:
  ENDP IibVFNMADD123SS::
↑ VFNMADD231SS
Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
Description
VFNMADD231SS
Intel reference
VFNMADD231SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 BD /r
VFNMADD231SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 BD /r
Opcode
0xBD
Tested by
t5402
IibVFNMADD231SS:: PROC
    IiEmitOpcode 0xBD
    JMP IibVFMADD132SS.op:
  ENDP IibVFNMADD231SS::
↑ VFNMADD321SS
Fused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
Intel reference
VFNMADD321SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 BD /r
VFNMADD321SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 BD /r
Opcode
0xBD
Tested by
t5403
IibVFNMADD321SS:: PROC
    JMP IibVFNMADD231SS:
  ENDP IibVFNMADD321SS::
↑ VFNMSUB132SS
Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
Description
VFNMSUB132SS
Intel reference
VFNMSUB132SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 9F /r
VFNMSUB132SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 9F /r
Opcode
0x9F
Tested by
t5402
IibVFNMSUB132SS:: PROC
    IiEmitOpcode 0x9F
    JMP IibVFMADD132SS.op:
  ENDP IibVFNMSUB132SS::
↑ VFNMSUB312SS
Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
Intel reference
VFNMSUB312SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 9F /r
VFNMSUB312SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 9F /r
Opcode
0x9F
Tested by
t5403
IibVFNMSUB312SS:: PROC
    JMP IibVFNMSUB132SS:
  ENDP IibVFNMSUB312SS::
↑ VFNMSUB213SS
Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
Description
VFNMSUB213SS
Intel reference
VFNMSUB213SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 AF /r
VFNMSUB213SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 AF /r
Opcode
0xAF
Tested by
t5402
IibVFNMSUB213SS:: PROC
    IiEmitOpcode 0xAF
    JMP IibVFMADD132SS.op:
  ENDP IibVFNMSUB213SS::
↑ VFNMSUB123SS
Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
Intel reference
VFNMSUB123SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 AF /r
VFNMSUB123SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 AF /r
Opcode
0xAF
Tested by
t5403
IibVFNMSUB123SS:: PROC
    JMP IibVFNMSUB213SS:
  ENDP IibVFNMSUB123SS::
↑ VFNMSUB231SS
Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
Description
VFNMSUB231SS
Intel reference
VFNMSUB231SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 BF /r
VFNMSUB231SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 BF /r
Opcode
0xBF
Tested by
t5402
IibVFNMSUB231SS:: PROC
    IiEmitOpcode 0xBF
    JMP IibVFMADD132SS.op:
  ENDP IibVFNMSUB231SS::
↑ VFNMSUB321SS
Fused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
Intel reference
VFNMSUB321SS xmm1, xmm2, xmm3/m32 VEX.DDS.LIG.66.0F38.W0 BF /r
VFNMSUB321SS xmm1 {k1}{z}, xmm2, xmm3/m32{er} EVEX.DDS.LIG.66.0F38.W0 BF /r
Opcode
0xBF
Tested by
t5403
IibVFNMSUB321SS:: PROC
    JMP IibVFNMSUB231SS:
  ENDP IibVFNMSUB321SS::
↑ VFMADD132SD
Fused Multiply-Add of Scalar Double- Precision Floating-Point Values
Description
VFMADD132SD
Intel reference
VFMADD132SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 99 /r
VFMADD132SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 99 /r
Opcode
0x99
Tested by
t5404
IibVFMADD132SD:: PROC
    IiEmitOpcode 0x99
.op:IiAllowModifier MASK
    IiRequire FMA
    IiDisp8EVEX T1S64
    IiOpEn RVM 
    IiModRM /r
    IiEncoding DATA=QWORD
    IiDispatchFormat  xmm.xmm.xmm, xmm.xmm.mem
.xmm.xmm.xmm:
    IiAllowModifier ROUND
.xmm.xmm.mem:
    IiEmitPrefix VEX.DDS.LIG.66.0F38.W1, EVEX.DDS.LIG.66.0F38.W1
    RET
  ENDP IibVFMADD132SD::
↑ VFMADD312SD
Fused Multiply-Add of Scalar Double- Precision Floating-Point Values
Intel reference
VFMADD312SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 99 /r
VFMADD312SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 99 /r
Opcode
0x99
Tested by
t5405
IibVFMADD312SD:: PROC
    JMP IibVFMADD132SD:
  ENDP IibVFMADD312SD::
↑ VFMADD213SD
Fused Multiply-Add of Scalar Double- Precision Floating-Point Values
Description
VFMADD213SD
Intel reference
VFMADD213SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 A9 /r
VFMADD213SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 A9 /r
Opcode
0xA9
Tested by
t5404
IibVFMADD213SD:: PROC
    IiEmitOpcode 0xA9
    JMP IibVFMADD132SD.op:
  ENDP IibVFMADD213SD::
↑ VFMADD123SD
Fused Multiply-Add of Scalar Double- Precision Floating-Point Values
Intel reference
VFMADD123SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 A9 /r
VFMADD123SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 A9 /r
Opcode
0xA9
Tested by
t5405
IibVFMADD123SD:: PROC
    JMP IibVFMADD213SD:
  ENDP IibVFMADD123SD::
↑ VFMADD231SD
Fused Multiply-Add of Scalar Double- Precision Floating-Point Values
Description
VFMADD231SD
Intel reference
VFMADD231SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 B9 /r
VFMADD231SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 B9 /r
Opcode
0xB9
Tested by
t5404
IibVFMADD231SD:: PROC
    IiEmitOpcode 0xB9
    JMP IibVFMADD132SD.op:
  ENDP IibVFMADD231SD::
↑ VFMADD321SD
Fused Multiply-Add of Scalar Double- Precision Floating-Point Values
Intel reference
VFMADD321SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 B9 /r
VFMADD321SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 B9 /r
Opcode
0xB9
Tested by
t5405
IibVFMADD321SD:: PROC
    JMP IibVFMADD231SD:
  ENDP IibVFMADD321SD::
↑ VFMSUB132SD
Fused Multiply-Subtract of Scalar Double- Precision Floating-Point Values
Description
VFMSUB132SD
Intel reference
VFMSUB132SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 9B /r
VFMSUB132SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 9B /r
Opcode
0x9B
Tested by
t5404
IibVFMSUB132SD:: PROC
    IiEmitOpcode 0x9B
    JMP IibVFMADD132SD.op:
  ENDP IibVFMSUB132SD::
↑ VFMSUB312SD
Fused Multiply-Subtract of Scalar Double- Precision Floating-Point Values
Intel reference
VFMSUB312SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 9B /r
VFMSUB312SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 9B /r
Opcode
0x9B
Tested by
t5405
IibVFMSUB312SD:: PROC
   JMP IibVFMSUB132SD:
  ENDP IibVFMSUB312SD::
↑ VFMSUB213SD
Fused Multiply-Subtract of Scalar Double- Precision Floating-Point Values
Description
VFMSUB213SD
Intel reference
VFMSUB213SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 AB /r
VFMSUB213SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 AB /r
Opcode
0xAB
Tested by
t5404
IibVFMSUB213SD:: PROC
    IiEmitOpcode 0xAB
    JMP IibVFMADD132SD.op:
  ENDP IibVFMSUB213SD::
↑ VFMSUB123SD
Fused Multiply-Subtract of Scalar Double- Precision Floating-Point Values
Intel reference
VFMSUB123SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 AB /r
VFMSUB123SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 AB /r
Opcode
0xAB
Tested by
t5405
IibVFMSUB123SD:: PROC
    JMP IibVFMSUB213SD:
  ENDP IibVFMSUB123SD::
↑ VFMSUB231SD
Fused Multiply-Subtract of Scalar Double- Precision Floating-Point Values
Description
VFMSUB231SD
Intel reference
VFMSUB231SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 BB /r
VFMSUB231SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 BB /r
Opcode
0xBB
Tested by
t5404
IibVFMSUB231SD:: PROC
    IiEmitOpcode 0xBB
    JMP IibVFMADD132SD.op:
  ENDP IibVFMSUB231SD::
↑ VFMSUB321SD
Fused Multiply-Subtract of Scalar Double- Precision Floating-Point Values
Intel reference
VFMSUB321SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 BB /r
VFMSUB321SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 BB /r
Opcode
0xBB
Tested by
t5405
IibVFMSUB321SD:: PROC
    JMP IibVFMSUB231SD:
  ENDP IibVFMSUB321SD::
↑ VFNMADD132SD
Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
Description
VFNMADD132SD
Intel reference
VFNMADD132SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 9D /r
VFNMADD132SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 9D /r
Opcode
0x9D
Tested by
t5406
IibVFNMADD132SD:: PROC
    IiEmitOpcode 0x9D
    JMP IibVFMADD132SD.op:
  ENDP IibVFNMADD132SD::
↑ VFNMADD312SD
Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
Intel reference
VFNMADD312SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 9D /r
VFNMADD312SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 9D /r
Opcode
0x9D
Tested by
t5407
IibVFNMADD312SD:: PROC
    JMP IibVFNMADD132SD:
  ENDP IibVFNMADD312SD::
↑ VFNMADD213SD
Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
Description
VFNMADD213SD
Intel reference
VFNMADD213SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 AD /r
VFNMADD213SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 AD /r
Opcode
0xAD
Tested by
t5406
IibVFNMADD213SD:: PROC
    IiEmitOpcode 0xAD
    JMP IibVFMADD132SD.op:
  ENDP IibVFNMADD213SD::
↑ VFNMADD123SD
Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
Intel reference
VFNMADD123SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 AD /r
VFNMADD123SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 AD /r
Opcode
0xAD
Tested by
t5407
IibVFNMADD123SD:: PROC
    JMP IibVFNMADD213SD:
  ENDP IibVFNMADD123SD::
↑ VFNMADD231SD
Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
Description
VFNMADD231SD
Intel reference
VFNMADD231SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 BD /r
VFNMADD231SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 BD /r
Opcode
0xBD
Tested by
t5406
IibVFNMADD231SD:: PROC
    IiEmitOpcode 0xBD
    JMP IibVFMADD132SD.op:
  ENDP IibVFNMADD231SD::
↑ VFNMADD321SD
Fused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
Intel reference
VFNMADD321SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 BD /r
VFNMADD321SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 BD /r
Opcode
0xBD
Tested by
t5407
IibVFNMADD321SD:: PROC
    JMP IibVFNMADD231SD:
  ENDP IibVFNMADD321SD::
↑ VFNMSUB132SD
Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
Description
VFNMSUB132SD
Intel reference
VFNMSUB132SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 9F /r
VFNMSUB132SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 9F /r
Opcode
0x9F
Tested by
t5406
IibVFNMSUB132SD:: PROC
    IiEmitOpcode 0x9F
    JMP IibVFMADD132SD.op:
  ENDP IibVFNMSUB132SD::
↑ VFNMSUB312SD
Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
Intel reference
VFNMSUB312SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 9F /r
VFNMSUB312SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 9F /r
Opcode
0x9F
Tested by
t5407
IibVFNMSUB312SD:: PROC
    JMP IibVFNMSUB132SD:
  ENDP IibVFNMSUB312SD::
↑ VFNMSUB213SD
Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
Description
VFNMSUB213SD
Intel reference
VFNMSUB213SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 AF /r
VFNMSUB213SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 AF /r
Opcode
0xAF
Tested by
t5406
IibVFNMSUB213SD:: PROC
    IiEmitOpcode 0xAF
    JMP IibVFMADD132SD.op:
  ENDP IibVFNMSUB213SD::
↑ VFNMSUB123SD
Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
Intel reference
VFNMSUB123SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 AF /r
VFNMSUB123SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 AF /r
Opcode
0xAF
Tested by
t5407
IibVFNMSUB123SD:: PROC
    JMP IibVFNMSUB213SD:
  ENDP IibVFNMSUB123SD::
↑ VFNMSUB231SD
Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
Description
VFNMSUB231SD
Intel reference
VFNMSUB231SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 BF /r
VFNMSUB231SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 BF /r
Opcode
0xBF
Tested by
t5406
IibVFNMSUB231SD:: PROC
    IiEmitOpcode 0xBF
    JMP IibVFMADD132SD.op:
  ENDP IibVFNMSUB231SD::
↑ VFNMSUB321SD
Fused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
Intel reference
VFNMSUB321SD xmm1, xmm2, xmm3/m64 VEX.DDS.LIG.66.0F38.W1 BF /r
VFNMSUB321SD xmm1 {k1}{z}, xmm2, xmm3/m64{er} EVEX.DDS.LIG.66.0F38.W1 BF /r
Opcode
0xBF
Tested by
t5407
IibVFNMSUB321SD:: PROC
    JMP IibVFNMSUB231SD:
  ENDP IibVFNMSUB321SD::
↑ VFMADD132PS
Fused Multiply-Add of Packed Single- Precision Floating-Point Values
Description
VFMADD132PS
Intel reference
VFMADD132PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 98 /r
VFMADD132PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W0 98 /r
VFMADD132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 98 /r
VFMADD132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 98 /r
VFMADD132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 98 /r
VFMADD132PS zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 98 /r
Opcode
0x98
Tested by
t5410
IibVFMADD132PS:: PROC
    IiEmitOpcode 0x98
.op:IiAllowModifier MASK,EH
    IiRequire FMA
    IiAllowRounding
    IiAllowBroadcasting DWORD
    IiDisp8EVEX FV32
    IiDisp8MVEX Us32
    IiOpEn RVM
    IiModRM /r
    IiDispatchFormat  xmm.xmm.xmm, xmm.xmm.mem, ymm.ymm.ymm, ymm.ymm.mem, zmm.zmm.zmm, zmm.zmm.mem
.xmm.xmm.xmm:
.xmm.xmm.mem:
    IiEmitPrefix VEX.NDS.128.66.0F38.W0, EVEX.NDS.128.66.0F38.W0
    RET
.ymm.ymm.ymm:
.ymm.ymm.mem:
    IiEmitPrefix VEX.NDS.256.66.0F38.W0, EVEX.NDS.256.66.0F38.W0
    RET
.zmm.zmm.zmm:
.zmm.zmm.mem:
    IiEmitPrefix EVEX.NDS.512.66.0F38.W0, MVEX.NDS.512.66.0F38.W0
    RET
  ENDP IibVFMADD132PS::
↑ VFMADD312PS
Fused Multiply-Add of Packed Single- Precision Floating-Point Values
Intel reference
VFMADD312PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 98 /r
VFMADD312PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W0 98 /r
VFMADD312PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 98 /r
VFMADD312PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 98 /r
VFMADD312PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 98 /r
VFMADD312PS zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 98 /r
Opcode
0x98
Tested by
t5411
IibVFMADD312PS:: PROC
    JMP IibVFMADD132PS:
  ENDP IibVFMADD312PS::
↑ VFMADD213PS
Fused Multiply-Add of Packed Single- Precision Floating-Point Values
Description
VFMADD213PS
Intel reference
VFMADD213PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 A8 /r
VFMADD213PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W0 A8 /r
VFMADD213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 A8 /r
VFMADD213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 A8 /r
VFMADD213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 A8 /r
VFMADD213PS zmm1 {k1}{z}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 A8 /r
Opcode
0xA8
Tested by
t5410
IibVFMADD213PS:: PROC
    IiEmitOpcode 0xA8
    JMP IibVFMADD132PS.op:
  ENDP IibVFMADD213PS::
↑ VFMADD123PS
Fused Multiply-Add of Packed Single- Precision Floating-Point Values
Intel reference
VFMADD123PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 A8 /r
VFMADD123PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W0 A8 /r
VFMADD123PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 A8 /r
VFMADD123PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 A8 /r
VFMADD123PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 A8 /r
VFMADD123PS zmm1 {k1}{z}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 A8 /r
Opcode
0xA8
Tested by
t5411
IibVFMADD123PS:: PROC
    JMP IibVFMADD213PS:
  ENDP IibVFMADD123PS::
↑ VFMADD231PS
Fused Multiply-Add of Packed Single- Precision Floating-Point Values
Description
VFMADD231PS
Intel reference
VFMADD231PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 B8 /r
VFMADD231PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.0 B8 /r
VFMADD231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 B8 /r
VFMADD231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 B8 /r
VFMADD231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 B8 /r
VFMADD231PS zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 B8 /r
Opcode
0xB8
Tested by
t5410
IibVFMADD231PS:: PROC
    IiEmitOpcode 0xB8
    JMP IibVFMADD132PS.op:
  ENDP IibVFMADD231PS::
↑ VFMADD321PS
Fused Multiply-Add of Packed Single- Precision Floating-Point Values
Intel reference
VFMADD321PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 B8 /r
VFMADD321PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.0 B8 /r
VFMADD321PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 B8 /r
VFMADD321PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 B8 /r
VFMADD321PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 B8 /r
VFMADD321PS zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 B8 /r
Opcode
0xB8
Tested by
t5411
IibVFMADD321PS:: PROC
   JMP IibVFMADD231PS:
  ENDP IibVFMADD321PS::
↑ VFMSUB132PS
Fused Multiply-Subtract of Packed Single- Precision Floating-Point Values
Description
VFMSUB132PS
Intel reference
VFMSUB132PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 9A /r
VFMSUB132PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W0 9A /r
VFMSUB132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 9A /r
VFMSUB132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 9A /r
VFMSUB132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 9A /r
VFMSUB132PS zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 9A /r
Opcode
0x9A
Tested by
t5410
IibVFMSUB132PS:: PROC
    IiEmitOpcode 0x9A
    JMP IibVFMADD132PS.op:
  ENDP IibVFMSUB132PS::
↑ VFMSUB312PS
Fused Multiply-Subtract of Packed Single- Precision Floating-Point Values
Intel reference
VFMSUB312PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 9A /r
VFMSUB312PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W0 9A /r
VFMSUB312PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 9A /r
VFMSUB312PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 9A /r
VFMSUB312PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 9A /r
VFMSUB312PS zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 9A /r
Opcode
0x9A
Tested by
t5411
IibVFMSUB312PS:: PROC
   JMP IibVFMSUB132PS:
  ENDP IibVFMSUB312PS::
↑ VFMSUB213PS
Fused Multiply-Subtract of Packed Single- Precision Floating-Point Values
Description
VFMSUB213PS
Intel reference
VFMSUB213PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 AA /r
VFMSUB213PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W0 AA /r
VFMSUB213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 AA /r
VFMSUB213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 AA /r
VFMSUB213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 AA /r
VFMSUB213PS zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 AA /r
Opcode
0xAA
Tested by
t5410
IibVFMSUB213PS:: PROC
    IiEmitOpcode 0xAA
    JMP IibVFMADD132PS.op:
  ENDP IibVFMSUB213PS::
↑ VFMSUB123PS
Fused Multiply-Subtract of Packed Single- Precision Floating-Point Values
Intel reference
VFMSUB123PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 AA /r
VFMSUB123PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W0 AA /r
VFMSUB123PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 AA /r
VFMSUB123PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 AA /r
VFMSUB123PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 AA /r
VFMSUB123PS zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 AA /r
Opcode
0xAA
Tested by
t5411
IibVFMSUB123PS:: PROC
   JMP IibVFMSUB213PS:
  ENDP IibVFMSUB123PS::
↑ VFMSUB231PS
Fused Multiply-Subtract of Packed Single- Precision Floating-Point Values
Description
VFMSUB231PS
Intel reference
VFMSUB231PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 BA /r
VFMSUB231PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.0 BA /r
VFMSUB231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 BA /r
VFMSUB231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 BA /r
VFMSUB231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 BA /r
VFMSUB231PS zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 BA /r
Opcode
0xBA
Tested by
t5410
IibVFMSUB231PS:: PROC
    IiEmitOpcode 0xBA
    JMP IibVFMADD132PS.op:
  ENDP IibVFMSUB231PS::
↑ VFMSUB321PS
Fused Multiply-Subtract of Packed Single- Precision Floating-Point Values
Intel reference
VFMSUB321PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 BA /r
VFMSUB321PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.0 BA /r
VFMSUB321PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 BA /r
VFMSUB321PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 BA /r
VFMSUB321PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 BA /r
VFMSUB321PS zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 BA /r
Opcode
0xBA
Tested by
t5411
IibVFMSUB321PS:: PROC
   JMP IibVFMSUB231PS:
  ENDP IibVFMSUB321PS::
↑ VFNMADD132PS
Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
Description
VFNMADD132PS
Intel reference
VFNMADD132PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 9C /r R
VFNMADD132PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W0 9C /r R
VFNMADD132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 9C /r F
VFNMADD132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 9C /r F
VFNMADD132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 9C /r F
VFNMADD132PS zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 9C /r
Opcode
0x9C
Tested by
t5412
IibVFNMADD132PS:: PROC
    IiEmitOpcode 0x9C
    JMP IibVFMADD132PS.op:
  ENDP IibVFNMADD132PS::
↑ VFNMADD312PS
Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
Intel reference
VFNMADD312PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 9C /r R
VFNMADD312PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W0 9C /r R
VFNMADD312PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 9C /r F
VFNMADD312PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 9C /r F
VFNMADD312PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 9C /r F
VFNMADD312PS zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 9C /r
Opcode
0x9C
Tested by
t5413
IibVFNMADD312PS:: PROC
    JMP IibVFNMADD132PS
  ENDP IibVFNMADD312PS::
↑ VFNMADD213PS
Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
Description
VFNMADD213PS
Intel reference
VFNMADD213PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 AC /r
VFNMADD213PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W0 AC /r
VFNMADD213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 AC /r
VFNMADD213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 AC /r
VFNMADD213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 AC /r
VFNMADD213PS zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 AC /r
Opcode
0xAC
Tested by
t5412
IibVFNMADD213PS:: PROC
    IiEmitOpcode 0xAC
    JMP IibVFMADD132PS.op:
  ENDP IibVFNMADD213PS::
↑ VFNMADD123PS
Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
Intel reference
VFNMADD123PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 AC /r
VFNMADD123PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W0 AC /r
VFNMADD123PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 AC /r
VFNMADD123PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 AC /r
VFNMADD123PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 AC /r
VFNMADD123PS zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 AC /r
Opcode
0xAC
Tested by
t5413
IibVFNMADD123PS:: PROC
   JMP IibVFNMADD213PS:
  ENDP IibVFNMADD123PS::
↑ VFNMADD231PS
Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
Description
VFNMADD231PS
Intel reference
VFNMADD231PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 BC /r
VFNMADD231PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.0 BC /r
VFNMADD231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 BC /r
VFNMADD231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 BC /r
VFNMADD231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 BC /r
VFNMADD231PS zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 BC /r
Opcode
0xBC
Tested by
t5412
IibVFNMADD231PS:: PROC
    IiEmitOpcode 0xBC
    JMP IibVFMADD132PS.op:
  ENDP IibVFNMADD231PS::
↑ VFNMADD321PS
Fused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
Intel reference
VFNMADD321PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 BC /r
VFNMADD321PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.0 BC /r
VFNMADD321PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 BC /r
VFNMADD321PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 BC /r
VFNMADD321PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 BC /r
VFNMADD321PS zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 BC /r
Opcode
0xBC
Tested by
t5413
IibVFNMADD321PS:: PROC
   JMP IibVFNMADD231PS:
  ENDP IibVFNMADD321PS::
↑ VFNMSUB132PS
Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
Description
VFNMSUB132PS
Intel reference
VFNMSUB132PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 9E /r
VFNMSUB132PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W0 9E /r
VFNMSUB132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 9E /r
VFNMSUB132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 9E /r
VFNMSUB132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 9E /r
VFNMSUB132PS zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 9E /r
Opcode
0x9E
Tested by
t5412
IibVFNMSUB132PS:: PROC
    IiEmitOpcode 0x9E
    JMP IibVFMADD132PS.op:
  ENDP IibVFNMSUB132PS::
↑ VFNMSUB312PS
Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
Intel reference
VFNMSUB312PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 9E /r
VFNMSUB312PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W0 9E /r
VFNMSUB312PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 9E /r
VFNMSUB312PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 9E /r
VFNMSUB312PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 9E /r
VFNMSUB312PS zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 9E /r
Opcode
0x9E
Tested by
t5413
IibVFNMSUB312PS:: PROC
   JMP IibVFNMSUB132PS:
  ENDP IibVFNMSUB312PS::
↑ VFNMSUB213PS
Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
Description
VFNMSUB213PS
Intel reference
VFNMSUB213PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 AE /r
VFNMSUB213PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W0 AE /r
VFNMSUB213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 AE /r
VFNMSUB213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 AE /r
VFNMSUB213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 AE /r
VFNMSUB213PS zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 AE /r
Opcode
0xAE
Tested by
t5412
IibVFNMSUB213PS:: PROC
    IiEmitOpcode 0xAE
    JMP IibVFMADD132PS.op:
  ENDP IibVFNMSUB213PS::
↑ VFNMSUB123PS
Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
Intel reference
VFNMSUB123PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 AE /r
VFNMSUB123PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W0 AE /r
VFNMSUB123PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 AE /r
VFNMSUB123PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 AE /r
VFNMSUB123PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 AE /r
VFNMSUB123PS zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 AE /r
Opcode
0xAE
Tested by
t5413
IibVFNMSUB123PS:: PROC
   JMP IibVFNMSUB213PS:
  ENDP IibVFNMSUB123PS::
↑ VFNMSUB231PS
Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
Description
VFNMSUB231PS
Intel reference
VFNMSUB231PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 BE /r
VFNMSUB231PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W0 BE /r
VFNMSUB231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 BE /r
VFNMSUB231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 BE /r
VFNMSUB231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 BE /r
VFNMSUB231PS zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 BE /r
Opcode
0xBE
Tested by
t5412
IibVFNMSUB231PS:: PROC
    IiEmitOpcode 0xBE
    JMP IibVFMADD132PS.op:
  ENDP IibVFNMSUB231PS::
↑ VFNMSUB321PS
Fused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
Intel reference
VFNMSUB321PS xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W0 BE /r
VFNMSUB321PS ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W0 BE /r
VFNMSUB321PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.NDS.128.66.0F38.W0 BE /r
VFNMSUB321PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.NDS.256.66.0F38.W0 BE /r
VFNMSUB321PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.NDS.512.66.0F38.W0 BE /r
VFNMSUB321PS zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W0 BE /r
Opcode
0xBE
Tested by
t5413
IibVFNMSUB321PS:: PROC
   JMP IibVFNMSUB231PS:
  ENDP IibVFNMSUB321PS::
↑ VFMADD132PD
Fused Multiply-Add of Packed Double- Precision Floating-Point Values
Description
VFMADD132PD
Intel reference
VFMADD132PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 98 /r
VFMADD132PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 98 /r
VFMADD132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 98 /r
VFMADD132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 98 /r
VFMADD132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 98 /r
VFMADD132PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 98 /r
Opcode
0x98
Tested by
t5414
IibVFMADD132PD:: PROC
    IiEmitOpcode 0x98
.op:IiAllowModifier MASK
    IiRequire FMA
    IiAllowRounding
    IiAllowBroadcasting QWORD
    IiDisp8EVEX FV64
    IiDisp8MVEX Ub64
    IiOpEn RVM
    IiModRM /r
    IiDispatchFormat  xmm.xmm.xmm, xmm.xmm.mem, ymm.ymm.ymm, ymm.ymm.mem, zmm.zmm.zmm, zmm.zmm.mem
.xmm.xmm.xmm:
.xmm.xmm.mem:
    IiEmitPrefix VEX.NDS.128.66.0F38.W1, EVEX.NDS.128.66.0F38.W1
    RET
.ymm.ymm.ymm:
.ymm.ymm.mem:
    IiEmitPrefix VEX.NDS.256.66.0F38.W1, EVEX.NDS.256.66.0F38.W1
    RET
.zmm.zmm.zmm:
.zmm.zmm.mem:
    IiEmitPrefix EVEX.NDS.512.66.0F38.W1, MVEX.NDS.512.66.0F38.W1
    RET
  ENDP IibVFMADD132PD::
↑ VFMADD312PD
Fused Multiply-Add of Packed Double- Precision Floating-Point Values
Intel reference
VFMADD312PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 98 /r
VFMADD312PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 98 /r
VFMADD312PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 98 /r
VFMADD312PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 98 /r
VFMADD312PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 98 /r
VFMADD312PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 98 /r
Opcode
0x98
Tested by
t5415
IibVFMADD312PD:: PROC
      JMP IibVFMADD132PD:
  ENDP IibVFMADD312PD::
↑ VFMADD213PD
Fused Multiply-Add of Packed Double- Precision Floating-Point Values
Description
VFMADD213PD
Intel reference
VFMADD213PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 A8 /r
VFMADD213PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 A8 /r
VFMADD213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 A8 /r
VFMADD213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 A8 /r
VFMADD213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 A8 /r
VFMADD213PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 A8 /r
Opcode
0xA8
Tested by
t5414
IibVFMADD213PD:: PROC
    IiEmitOpcode 0xA8
    JMP IibVFMADD132PD.op:
  ENDP IibVFMADD213PD::
↑ VFMADD123PD
Fused Multiply-Add of Packed Double- Precision Floating-Point Values
Intel reference
VFMADD123PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 A8 /r
VFMADD123PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 A8 /r
VFMADD123PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 A8 /r
VFMADD123PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 A8 /r
VFMADD123PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 A8 /r
VFMADD123PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 A8 /r
Opcode
0xA8
Tested by
t5415
IibVFMADD123PD:: PROC
   JMP IibVFMADD213PD:
  ENDP IibVFMADD123PD::
↑ VFMADD231PD
Fused Multiply-Add of Packed Double- Precision Floating-Point Values
Description
VFMADD231PD
Intel reference
VFMADD231PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 B8 /r
VFMADD231PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 B8 /r
VFMADD231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 B8 /r
VFMADD231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 B8 /r
VFMADD231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 B8 /r
VFMADD231PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 B8 /r
Opcode
0xB8
Tested by
t5414
IibVFMADD231PD:: PROC
    IiEmitOpcode 0xB8
    JMP IibVFMADD132PD.op:
  ENDP IibVFMADD231PD::
↑ VFMADD321PD
Fused Multiply-Add of Packed Double- Precision Floating-Point Values
Intel reference
VFMADD321PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 B8 /r
VFMADD321PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 B8 /r
VFMADD321PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 B8 /r
VFMADD321PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 B8 /r
VFMADD321PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 B8 /r
VFMADD321PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 B8 /r
Opcode
0xB8
Tested by
t5415
IibVFMADD321PD:: PROC
   JMP IibVFMADD231PD:
  ENDP IibVFMADD321PD::
↑ VFMSUB132PD
Fused Multiply-Subtract of Packed Double- Precision Floating-Point Values
Description
VFMSUB132PD
Intel reference
VFMSUB132PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 9A /r
VFMSUB132PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 9A /r
VFMSUB132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 9A /r
VFMSUB132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 9A /r
VFMSUB132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 9A /r
VFMSUB132PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 9A /r
Opcode
0x9A
Tested by
t5414
IibVFMSUB132PD:: PROC
    IiEmitOpcode 0x9A
    JMP IibVFMADD132PD.op:
  ENDP IibVFMSUB132PD::
↑ VFMSUB312PD
Fused Multiply-Subtract of Packed Double- Precision Floating-Point Values
Intel reference
VFMSUB312PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 9A /r
VFMSUB312PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 9A /r
VFMSUB312PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 9A /r
VFMSUB312PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 9A /r
VFMSUB312PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 9A /r
VFMSUB312PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 9A /r
Opcode
0x9A
Tested by
t5415
IibVFMSUB312PD:: PROC
   JMP IibVFMSUB132PD:
  ENDP IibVFMSUB312PD::
↑ VFMSUB213PD
Fused Multiply-Subtract of Packed Double- Precision Floating-Point Values
Description
VFMSUB213PD
Intel reference
VFMSUB213PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 AA /r
VFMSUB213PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 AA /r
VFMSUB213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 AA /r
VFMSUB213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 AA /r
VFMSUB213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 AA /r
VFMSUB213PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 AA /r
Opcode
0xAA
Tested by
t5414
IibVFMSUB213PD:: PROC
    IiEmitOpcode 0xAA
    JMP IibVFMADD132PD.op:
  ENDP IibVFMSUB213PD::
↑ VFMSUB123PD
Fused Multiply-Subtract of Packed Double- Precision Floating-Point Values
Intel reference
VFMSUB123PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 AA /r
VFMSUB123PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 AA /r
VFMSUB123PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 AA /r
VFMSUB123PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 AA /r
VFMSUB123PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 AA /r
VFMSUB123PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 AA /r
Opcode
0xAA
Tested by
t5415
IibVFMSUB123PD:: PROC
   JMP IibVFMSUB213PD:
  ENDP IibVFMSUB123PD::
↑ VFMSUB231PD
Fused Multiply-Subtract of Packed Double- Precision Floating-Point Values
Description
VFMSUB231PD
Intel reference
VFMSUB231PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 BA /r
VFMSUB231PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 BA /r
VFMSUB231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 BA /r
VFMSUB231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 BA /r
VFMSUB231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 BA /r
VFMSUB231PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 BA /r
Opcode
0xBA
Tested by
t5414
IibVFMSUB231PD:: PROC
    IiEmitOpcode 0xBA
    JMP IibVFMADD132PD.op:
  ENDP IibVFMSUB231PD::
↑ VFMSUB321PD
Fused Multiply-Subtract of Packed Double- Precision Floating-Point Values
Intel reference
VFMSUB321PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 BA /r
VFMSUB321PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 BA /r
VFMSUB321PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 BA /r
VFMSUB321PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 BA /r
VFMSUB321PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 BA /r
VFMSUB321PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 BA /r
Opcode
0xBA
Tested by
t5415
IibVFMSUB321PD:: PROC
   JMP IibVFMSUB231PD:
  ENDP IibVFMSUB321PD::
↑ VFNMADD132PD
Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
Description
VFNMADD132PD
Intel reference
VFNMADD132PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 9C /r
VFNMADD132PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 9C /r
VFNMADD132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 9C /r
VFNMADD132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 9C /r
VFNMADD132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 9C /r
VFNMADD132PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 9C /r
Opcode
0x9C
Tested by
t5416
IibVFNMADD132PD:: PROC
    IiEmitOpcode 0x9C
    JMP IibVFMADD132PD.op:
  ENDP IibVFNMADD132PD::
↑ VFNMADD312PD
Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
Intel reference
VFNMADD312PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 9C /r
VFNMADD312PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 9C /r
VFNMADD312PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 9C /r
VFNMADD312PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 9C /r
VFNMADD312PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 9C /r
VFNMADD312PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 9C /r
Opcode
0x9C
Tested by
t5417
IibVFNMADD312PD:: PROC
   JMP IibVFNMADD132PD:
  ENDP IibVFNMADD312PD::
↑ VFNMADD213PD
Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
Description
VFNMADD213PD
Intel reference
VFNMADD213PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 AC /r
VFNMADD213PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 AC /r
VFNMADD213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 AC /r
VFNMADD213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 AC /r
VFNMADD213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 AC /r
VFNMADD213PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 AC /r
Opcode
0xAC
Tested by
t5416
IibVFNMADD213PD:: PROC
    IiEmitOpcode 0xAC
    JMP IibVFMADD132PD.op:
  ENDP IibVFNMADD213PD::
↑ VFNMADD123PD
Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
Intel reference
VFNMADD123PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 AC /r
VFNMADD123PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 AC /r
VFNMADD123PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 AC /r
VFNMADD123PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 AC /r
VFNMADD123PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 AC /r
VFNMADD123PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 AC /r
Opcode
0xAC
Tested by
t5417
IibVFNMADD123PD:: PROC
   JMP IibVFNMADD213PD:
  ENDP IibVFNMADD123PD::
↑ VFNMADD231PD
Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
Description
VFNMADD231PD
Intel reference
VFNMADD231PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 BC /r
VFNMADD231PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 BC /r
VFNMADD231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 BC /r
VFNMADD231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 BC /r
VFNMADD231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 BC /r
VFNMADD231PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 BC /r
Opcode
0xBC
Tested by
t5416
IibVFNMADD231PD:: PROC
    IiEmitOpcode 0xBC
    JMP IibVFMADD132PD.op:
  ENDP IibVFNMADD231PD::
↑ VFNMADD321PD
Fused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
Intel reference
VFNMADD321PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 BC /r
VFNMADD321PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 BC /r
VFNMADD321PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 BC /r
VFNMADD321PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 BC /r
VFNMADD321PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 BC /r
VFNMADD321PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 BC /r
Opcode
0xBC
Tested by
t5417
IibVFNMADD321PD:: PROC
   JMP IibVFNMADD231PD:
  ENDP IibVFNMADD321PD::
↑ VFNMSUB132PD
Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
Description
VFNMSUB132PD
Intel reference
VFNMSUB132PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 9E /r
VFNMSUB132PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 9E /r
VFNMSUB132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 9E /r
VFNMSUB132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 9E /r
VFNMSUB132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 9E /r
VFNMSUB132PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 9E /r
Opcode
0x9E
Tested by
t5416
IibVFNMSUB132PD:: PROC
    IiEmitOpcode 0x9E
    JMP IibVFMADD132PD.op:
  ENDP IibVFNMSUB132PD::
↑ VFNMSUB312PD
Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
Intel reference
VFNMSUB312PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 9E /r
VFNMSUB312PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 9E /r
VFNMSUB312PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 9E /r
VFNMSUB312PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 9E /r
VFNMSUB312PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 9E /r
VFNMSUB312PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 9E /r
Opcode
0x9E
Tested by
t5417
IibVFNMSUB312PD:: PROC
   JMP IibVFNMSUB132PD:
  ENDP IibVFNMSUB312PD::
↑ VFNMSUB213PD
Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
Description
VFNMSUB213PD
Intel reference
VFNMSUB213PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 AE /r
VFNMSUB213PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 AE /r
VFNMSUB213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 AE /r
VFNMSUB213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 AE /r
VFNMSUB213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 AE /r
VFNMSUB213PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 AE /r
Opcode
0xAE
Tested by
t5416
IibVFNMSUB213PD:: PROC
    IiEmitOpcode 0xAE
    JMP IibVFMADD132PD.op:
  ENDP IibVFNMSUB213PD::
↑ VFNMSUB123PD
Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
Intel reference
VFNMSUB123PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 AE /r
VFNMSUB123PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 AE /r
VFNMSUB123PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 AE /r
VFNMSUB123PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 AE /r
VFNMSUB123PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 AE /r
VFNMSUB123PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 AE /r
Opcode
0xAE
Tested by
t5417
IibVFNMSUB123PD:: PROC
   JMP IibVFNMSUB213PD:
  ENDP IibVFNMSUB123PD::
↑ VFNMSUB231PD
Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
Description
VFNMSUB231PD
Intel reference
VFNMSUB231PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 BE /r
VFNMSUB231PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 BE /r
VFNMSUB231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 BE /r
VFNMSUB231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 BE /r
VFNMSUB231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 BE /r
VFNMSUB231PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 BE /r
Opcode
0xBE
Tested by
t5416
IibVFNMSUB231PD:: PROC
    IiEmitOpcode 0xBE
    JMP IibVFMADD132PD.op:
  ENDP IibVFNMSUB231PD::
↑ VFNMSUB321PD
Fused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
Intel reference
VFNMSUB321PD xmm1, xmm2, xmm3/m128 VEX.NDS.128.66.0F38.W1 BE /r
VFNMSUB321PD ymm1, ymm2, ymm3/m256 VEX.NDS.256.66.0F38.W1 BE /r
VFNMSUB321PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.NDS.128.66.0F38.W1 BE /r
VFNMSUB321PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.NDS.256.66.0F38.W1 BE /r
VFNMSUB321PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.NDS.512.66.0F38.W1 BE /r
VFNMSUB321PD zmm1 {k1}, zmm2, zmm3/mem MVEX.NDS.512.66.0F38.W1 BE /r
Opcode
0xBE
Tested by
t5417
IibVFNMSUB321PD:: PROC
   JMP IibVFNMSUB231PD:
  ENDP IibVFNMSUB321PD::
↑ VFMSUBADD132PS
Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
Description
VFMSUBADD132PS
Intel reference
VFMSUBADD132PS xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W0 97 /r
VFMSUBADD132PS ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W0 97 /r
VFMSUBADD132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.DDS.128.66.0F38.W0 97 /r
VFMSUBADD132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.DDS.256.66.0F38.W0 97 /r
VFMSUBADD132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.DDS.512.66.0F38.W0 97 /r
Opcode
0x97
Tested by
t5422
IibVFMSUBADD132PS:: PROC
    IiEmitOpcode 0x97
.op:IiAllowModifier MASK
    IiRequire FMA
    IiAllowRounding
    IiAllowBroadcasting DWORD
    IiDisp8EVEX FV32
    IiOpEn RVM
    IiModRM /r
    IiDispatchFormat  xmm.xmm.xmm, xmm.xmm.mem, ymm.ymm.ymm, ymm.ymm.mem, zmm.zmm.zmm, zmm.zmm.mem
.xmm.xmm.xmm:
.xmm.xmm.mem:
    IiEmitPrefix VEX.DDS.128.66.0F38.W0, EVEX.DDS.128.66.0F38.W0
    RET
.ymm.ymm.ymm:
.ymm.ymm.mem:
    IiEmitPrefix VEX.DDS.256.66.0F38.W0, EVEX.DDS.256.66.0F38.W0
    RET
.zmm.zmm.zmm:
.zmm.zmm.mem:
    IiEmitPrefix EVEX.DDS.512.66.0F38.W0
    RET
  ENDP IibVFMSUBADD132PS::
↑ VFMSUBADD312PS
Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
Intel reference
VFMSUBADD312PS xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W0 97 /r
VFMSUBADD312PS ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W0 97 /r
VFMSUBADD312PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.DDS.128.66.0F38.W0 97 /r
VFMSUBADD312PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.DDS.256.66.0F38.W0 97 /r
VFMSUBADD312PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.DDS.512.66.0F38.W0 97 /r
Opcode
0x97
Tested by
t5423
IibVFMSUBADD312PS:: PROC
   JMP IibVFMSUBADD132PS:
  ENDP IibVFMSUBADD312PS::
↑ VFMSUBADD213PS
Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
Description
VFMSUBADD213PS
Intel reference
VFMSUBADD213PS xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W0 A7 /r
VFMSUBADD213PS ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W0 A7 /r
VFMSUBADD213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.DDS.128.66.0F38.W0 A7 /r
VFMSUBADD213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.DDS.256.66.0F38.W0 A7 /r
VFMSUBADD213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.DDS.512.66.0F38.W0 A7 /r
Opcode
0xA7
Tested by
t5422
IibVFMSUBADD213PS:: PROC
    IiEmitOpcode 0xA7
    JMP IibVFMSUBADD132PS.op:
  ENDP IibVFMSUBADD213PS::
↑ VFMSUBADD123PS
Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
Intel reference
VFMSUBADD123PS xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W0 A7 /r
VFMSUBADD123PS ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W0 A7 /r
VFMSUBADD123PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.DDS.128.66.0F38.W0 A7 /r
VFMSUBADD123PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.DDS.256.66.0F38.W0 A7 /r
VFMSUBADD123PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.DDS.512.66.0F38.W0 A7 /r
Opcode
0xA7
Tested by
t5423
IibVFMSUBADD123PS:: PROC
   JMP IibVFMSUBADD213PS:
  ENDP IibVFMSUBADD123PS::
↑ VFMSUBADD231PS
Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
Description
VFMSUBADD231PS
Intel reference
VFMSUBADD231PS xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W0 B7 /r
VFMSUBADD231PS ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W0 B7 /r
VFMSUBADD231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.DDS.128.66.0F38.W0 B7 /r
VFMSUBADD231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.DDS.256.66.0F38.W0 B7 /r
VFMSUBADD231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.DDS.512.66.0F38.W0 B7 /r
Opcode
0xB7
Tested by
t5422
IibVFMSUBADD231PS:: PROC
    IiEmitOpcode 0xB7
    JMP IibVFMSUBADD132PS.op:
  ENDP IibVFMSUBADD231PS::
↑ VFMSUBADD321PS
Fused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
Intel reference
VFMSUBADD321PS xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W0 B7 /r
VFMSUBADD321PS ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W0 B7 /r
VFMSUBADD321PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.DDS.128.66.0F38.W0 B7 /r
VFMSUBADD321PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.DDS.256.66.0F38.W0 B7 /r
VFMSUBADD321PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.DDS.512.66.0F38.W0 B7 /r
Opcode
0xB7
Tested by
t5423
IibVFMSUBADD321PS:: PROC
   JMP IibVFMSUBADD231PS:
  ENDP IibVFMSUBADD321PS::
↑ VFMADDSUB132PS
Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
Description
VFMADDSUB132PS
Intel reference
VFMADDSUB132PS xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W0 96 /r
VFMADDSUB132PS ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W0 96 /r
VFMADDSUB132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.DDS.128.66.0F38.W0 96 /r
VFMADDSUB132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.DDS.256.66.0F38.W0 96 /r
VFMADDSUB132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.DDS.512.66.0F38.W0 96 /r
Opcode
0x96
Tested by
t5420
IibVFMADDSUB132PS:: PROC
    IiEmitOpcode 0x96
    JMP IibVFMSUBADD132PS.op:
  ENDP IibVFMADDSUB132PS::
↑ VFMADDSUB312PS
Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
Intel reference
VFMADDSUB312PS xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W0 96 /r
VFMADDSUB312PS ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W0 96 /r
VFMADDSUB312PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.DDS.128.66.0F38.W0 96 /r
VFMADDSUB312PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.DDS.256.66.0F38.W0 96 /r
VFMADDSUB312PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.DDS.512.66.0F38.W0 96 /r
Opcode
0x96
Tested by
t5421
IibVFMADDSUB312PS:: PROC
   JMP IibVFMADDSUB132PS:
  ENDP IibVFMADDSUB312PS::
↑ VFMADDSUB213PS
Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
Description
VFMADDSUB213PS
Intel reference
VFMADDSUB213PS xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W0 A6 /r
VFMADDSUB213PS ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W0 A6 /r
VFMADDSUB213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.DDS.128.66.0F38.W0 A6 /r
VFMADDSUB213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.DDS.256.66.0F38.W0 A6 /r
VFMADDSUB213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.DDS.512.66.0F38.W0 A6 /r
Opcode
0xA6
Tested by
t5420
IibVFMADDSUB213PS:: PROC
    IiEmitOpcode 0xA6
    JMP IibVFMSUBADD132PS.op:
  ENDP IibVFMADDSUB213PS::
↑ VFMADDSUB123PS
Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
Intel reference
VFMADDSUB123PS xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W0 A6 /r
VFMADDSUB123PS ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W0 A6 /r
VFMADDSUB123PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.DDS.128.66.0F38.W0 A6 /r
VFMADDSUB123PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.DDS.256.66.0F38.W0 A6 /r
VFMADDSUB123PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.DDS.512.66.0F38.W0 A6 /r
Opcode
0xA6
Tested by
t5421
IibVFMADDSUB123PS:: PROC
   JMP IibVFMADDSUB213PS:
  ENDP IibVFMADDSUB123PS::
↑ VFMADDSUB231PS
Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
Description
VFMADDSUB231PS
Intel reference
VFMADDSUB231PS xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W0 B6 /r
VFMADDSUB231PS ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W0 B6 /r
VFMADDSUB231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.DDS.128.66.0F38.W0 B6 /r
VFMADDSUB231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.DDS.256.66.0F38.W0 B6 /r
VFMADDSUB231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.DDS.512.66.0F38.W0 B6 /r
Opcode
0xB6
Tested by
t5420
IibVFMADDSUB231PS:: PROC
    IiEmitOpcode 0xB6
    JMP IibVFMSUBADD132PS.op:
  ENDP IibVFMADDSUB231PS::
↑ VFMADDSUB321PS
Fused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
Intel reference
VFMADDSUB321PS xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W0 B6 /r
VFMADDSUB321PS ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W0 B6 /r
VFMADDSUB321PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst EVEX.DDS.128.66.0F38.W0 B6 /r
VFMADDSUB321PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst EVEX.DDS.256.66.0F38.W0 B6 /r
VFMADDSUB321PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er} EVEX.DDS.512.66.0F38.W0 B6 /r
Opcode
0xB6
Tested by
t5421
IibVFMADDSUB321PS:: PROC
   JMP IibVFMADDSUB231PS:
  ENDP IibVFMADDSUB321PS::
↑ VFMSUBADD132PD
Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
Description
VFMSUBADD132PD
Intel reference
VFMSUBADD132PD xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W1 97 /r
VFMSUBADD132PD ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W1 97 /r
VFMSUBADD132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.DDS.128.66.0F38.W1 97 /r
VFMSUBADD132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.DDS.256.66.0F38.W1 97 /r
VFMSUBADD132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.DDS.512.66.0F38.W1 97 /r
Opcode
0x97
Tested by
t5422
IibVFMSUBADD132PD:: PROC
    IiEmitOpcode 0x97
.op:IiAllowModifier MASK
    IiRequire FMA
    IiAllowRounding
    IiAllowBroadcasting QWORD
    IiDisp8EVEX FV64
    IiOpEn RVM
    IiModRM /r
    IiDispatchFormat  xmm.xmm.xmm, xmm.xmm.mem, ymm.ymm.ymm, ymm.ymm.mem, zmm.zmm.zmm, zmm.zmm.mem
.xmm.xmm.xmm:
.xmm.xmm.mem:
    IiEmitPrefix VEX.DDS.128.66.0F38.W1, EVEX.DDS.128.66.0F38.W1
    RET
.ymm.ymm.ymm:
.ymm.ymm.mem:
    IiEmitPrefix VEX.DDS.256.66.0F38.W1, EVEX.DDS.256.66.0F38.W1
    RET
.zmm.zmm.zmm:
.zmm.zmm.mem:
    IiEmitPrefix EVEX.DDS.512.66.0F38.W1
    RET
  ENDP IibVFMSUBADD132PD::
↑ VFMSUBADD312PD
Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
Intel reference
VFMSUBADD312PD xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W1 97 /r
VFMSUBADD312PD ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W1 97 /r
VFMSUBADD312PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.DDS.128.66.0F38.W1 97 /r
VFMSUBADD312PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.DDS.256.66.0F38.W1 97 /r
VFMSUBADD312PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.DDS.512.66.0F38.W1 97 /r
Opcode
0x97
Tested by
t5423
IibVFMSUBADD312PD:: PROC
   JMP IibVFMSUBADD132PD:
  ENDP IibVFMSUBADD312PD::
↑ VFMSUBADD213PD
Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
Description
VFMSUBADD213PD
Intel reference
VFMSUBADD213PD xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W1 A7 /r
VFMSUBADD213PD ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W1 A7 /r
VFMSUBADD213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.DDS.128.66.0F38.W1 A7 /r
VFMSUBADD213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.DDS.256.66.0F38.W1 A7 /r
VFMSUBADD213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.DDS.512.66.0F38.W1 A7 /r
Opcode
0xA7
Tested by
t5422
IibVFMSUBADD213PD:: PROC
    IiEmitOpcode 0xA7
    JMP IibVFMSUBADD132PD.op:
  ENDP IibVFMSUBADD213PD::
↑ VFMSUBADD123PD
Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
Intel reference
VFMSUBADD123PD xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W1 A7 /r
VFMSUBADD123PD ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W1 A7 /r
VFMSUBADD123PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.DDS.128.66.0F38.W1 A7 /r
VFMSUBADD123PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.DDS.256.66.0F38.W1 A7 /r
VFMSUBADD123PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.DDS.512.66.0F38.W1 A7 /r
Opcode
0xA7
Tested by
t5423
IibVFMSUBADD123PD:: PROC
   JMP IibVFMSUBADD213PD:
  ENDP IibVFMSUBADD123PD::
↑ VFMSUBADD231PD
Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
Description
VFMSUBADD231PD
Intel reference
VFMSUBADD231PD xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W1 B7 /r
VFMSUBADD231PD ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W1 B7 /r
VFMSUBADD231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.DDS.128.66.0F38.W1 B7 /r
VFMSUBADD231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.DDS.256.66.0F38.W1 B7 /r
VFMSUBADD231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.DDS.512.66.0F38.W1 B7 /r
Opcode
0xB7
Tested by
t5422
IibVFMSUBADD231PD:: PROC
    IiEmitOpcode 0xB7
    JMP IibVFMSUBADD132PD.op:
  ENDP IibVFMSUBADD231PD::
↑ VFMSUBADD321PD
Fused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
Intel reference
VFMSUBADD321PD xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W1 B7 /r
VFMSUBADD321PD ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W1 B7 /r
VFMSUBADD321PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.DDS.128.66.0F38.W1 B7 /r
VFMSUBADD321PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.DDS.256.66.0F38.W1 B7 /r
VFMSUBADD321PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.DDS.512.66.0F38.W1 B7 /r
Opcode
0xB7
Tested by
t5423
IibVFMSUBADD321PD:: PROC
   JMP IibVFMSUBADD231PD:
  ENDP IibVFMSUBADD321PD::
↑ VFMADDSUB132PD
Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
Description
VFMADDSUB132PD
Intel reference
VFMADDSUB132PD xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W1 96 /r
VFMADDSUB132PD ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W1 96 /r
VFMADDSUB132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.DDS.128.66.0F38.W1 96 /r
VFMADDSUB132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.DDS.256.66.0F38.W1 96 /r
Opcode
0x96
Tested by
t5420
IibVFMADDSUB132PD:: PROC
    IiEmitOpcode 0x96
    JMP IibVFMSUBADD132PD.op:
  ENDP IibVFMADDSUB132PD::
↑ VFMADDSUB312PD
Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
Intel reference
VFMADDSUB312PD xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W1 96 /r
VFMADDSUB312PD ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W1 96 /r
VFMADDSUB312PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.DDS.128.66.0F38.W1 96 /r
VFMADDSUB312PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.DDS.256.66.0F38.W1 96 /r
Opcode
0x96
Tested by
t5421
IibVFMADDSUB312PD:: PROC
   JMP IibVFMADDSUB132PD:
  ENDP IibVFMADDSUB312PD::
↑ VFMADDSUB213PD
Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
Description
VFMADDSUB213PD
Intel reference
VFMADDSUB213PD xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W1 A6 /r
VFMADDSUB213PD ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W1 A6 /r
VFMADDSUB213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.DDS.128.66.0F38.W1 A6 /r
VFMADDSUB213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.DDS.256.66.0F38.W1 A6 /r
VFMADDSUB213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.DDS.512.66.0F38.W1 A6 /r
Opcode
0xA6
Tested by
t5420
IibVFMADDSUB213PD:: PROC
    IiEmitOpcode 0xA6
    JMP IibVFMSUBADD132PD.op:
  ENDP IibVFMADDSUB213PD::
↑ VFMADDSUB123PD
Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
Intel reference
VFMADDSUB123PD xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W1 A6 /r
VFMADDSUB123PD ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W1 A6 /r
VFMADDSUB123PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.DDS.128.66.0F38.W1 A6 /r
VFMADDSUB123PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.DDS.256.66.0F38.W1 A6 /r
VFMADDSUB123PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.DDS.512.66.0F38.W1 A6 /r
Opcode
0xA6
Tested by
t5421
IibVFMADDSUB123PD:: PROC
   JMP IibVFMADDSUB213PD:
  ENDP IibVFMADDSUB123PD::
↑ VFMADDSUB231PD
Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
Description
VFMADDSUB231PD
Intel reference
VFMADDSUB231PD xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W1 B6 /r
VFMADDSUB231PD ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W1 B6 /r
VFMADDSUB231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.DDS.128.66.0F38.W1 B6 /r
VFMADDSUB231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.DDS.256.66.0F38.W1 B6 /r
VFMADDSUB231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.DDS.512.66.0F38.W1 B6 /r
Opcode
0xB6
Tested by
t5420
IibVFMADDSUB231PD:: PROC
    IiEmitOpcode 0xB6
    JMP IibVFMSUBADD132PD.op:
  ENDP IibVFMADDSUB231PD::
↑ VFMADDSUB321PD
Fused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
Intel reference
VFMADDSUB321PD xmm1, xmm2, xmm3/m128 VEX.DDS.128.66.0F38.W1 B6 /r
VFMADDSUB321PD ymm1, ymm2, ymm3/m256 VEX.DDS.256.66.0F38.W1 B6 /r
VFMADDSUB321PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst EVEX.DDS.128.66.0F38.W1 B6 /r
VFMADDSUB321PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst EVEX.DDS.256.66.0F38.W1 B6 /r
VFMADDSUB321PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er} EVEX.DDS.512.66.0F38.W1 B6 /r
Opcode
0xB6
Tested by
t5421
IibVFMADDSUB321PD:: PROC
   JMP IibVFMADDSUB231PD:
  ENDP IibVFMADDSUB321PD::
  ENDPROGRAM iib

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