Test t5421:
Machine instructions VFMADDSUB312PS VFMADDSUB123PS VFMADDSUB321PS VFMADDSUB312PD VFMADDSUB123PD VFMADDSUB321PD
- Tested procedures
 - 
IibVFMADDSUB312PS
  
IibVFMADDSUB123PS
  
IibVFMADDSUB321PS
  
IibVFMADDSUB312PD
  
IibVFMADDSUB123PD
  
IibVFMADDSUB321PD
  
 
- Source & expected listing 
t5421.htm.lst
 - 
|                                | EUROASM LIST=ON,DUMP=ON,DUMPWIDTH=34,DUMPALL=OFF,CPU=X64,SIMD=AVX512,FMA=ON,EVEX=ON
|                                |t5421 PROGRAM FORMAT=BIN, LISTMAP=OFF, LISTGLOBALS=OFF
|[Mode64]                        |[Mode64] SEGMENT WIDTH=64,PURPOSE=CODE
|00000000:C4E26996CB             | VFMADDSUB312PS XMM1,XMM2,XMM3
|00000005:C4E269964D40           | VFMADDSUB312PS XMM1,XMM2,[RBP+40h]
|0000000B:62F26D0C964D04<4       | VFMADDSUB312PS XMM1,XMM2,[RBP+40h],MASK=K4
|00000012:62F26D18964D10<2       | VFMADDSUB312PS XMM1,XMM2,[RBP+40h],BCST=ON
|00000019:C4E26D96CB             | VFMADDSUB312PS YMM1,YMM2,YMM3
|0000001E:C4E26D964D40           | VFMADDSUB312PS YMM1,YMM2,[RBP+40h]
|00000024:62F26DAC964D02<5       | VFMADDSUB312PS YMM1,YMM2,[RBP+40h],MASK=K4,ZEROING=ON
|0000002B:62F26D38964D10<2       | VFMADDSUB312PS YMM1,YMM2,[RBP+40h],BCST=ON
|00000032:62F26D4896CB           | VFMADDSUB312PS ZMM1,ZMM2,ZMM3
|00000038:62F26D7896CB           | VFMADDSUB312PS ZMM1,ZMM2,ZMM3,ROUND=ZERO
|0000003E:62F26D48964D01<6       | VFMADDSUB312PS ZMM1,ZMM2,[RBP+40h]
|00000045:62F26DCC964D01<6       | VFMADDSUB312PS ZMM1,ZMM2,[RBP+40h],MASK=K4,ZEROING=ON
|0000004C:62F26D58964D10<2       | VFMADDSUB312PS ZMM1,ZMM2,[RBP+40h],BCST=ON
|00000053:C4E269A6CB             | VFMADDSUB123PS XMM1,XMM2,XMM3
|00000058:C4E269A64D40           | VFMADDSUB123PS XMM1,XMM2,[RBP+40h]
|0000005E:62F26D0CA64D04<4       | VFMADDSUB123PS XMM1,XMM2,[RBP+40h],MASK=K4
|00000065:62F26D18A64D10<2       | VFMADDSUB123PS XMM1,XMM2,[RBP+40h],BCST=ON
|0000006C:C4E26DA6CB             | VFMADDSUB123PS YMM1,YMM2,YMM3
|00000071:C4E26DA64D40           | VFMADDSUB123PS YMM1,YMM2,[RBP+40h]
|00000077:62F26DACA64D02<5       | VFMADDSUB123PS YMM1,YMM2,[RBP+40h],MASK=K4,ZEROING=ON
|0000007E:62F26D38A64D10<2       | VFMADDSUB123PS YMM1,YMM2,[RBP+40h],BCST=ON
|00000085:62F26D48A6CB           | VFMADDSUB123PS ZMM1,ZMM2,ZMM3
|0000008B:62F26D78A6CB           | VFMADDSUB123PS ZMM1,ZMM2,ZMM3,ROUND=ZERO
|00000091:62F26D48A64D01<6       | VFMADDSUB123PS ZMM1,ZMM2,[RBP+40h]
|00000098:62F26DCCA64D01<6       | VFMADDSUB123PS ZMM1,ZMM2,[RBP+40h],MASK=K4,ZEROING=ON
|0000009F:62F26D58A64D10<2       | VFMADDSUB123PS ZMM1,ZMM2,[RBP+40h],BCST=ON
|000000A6:C4E269B6CB             | VFMADDSUB321PS XMM1,XMM2,XMM3
|000000AB:C4E269B64D40           | VFMADDSUB321PS XMM1,XMM2,[RBP+40h]
|000000B1:62F26D0CB64D04<4       | VFMADDSUB321PS XMM1,XMM2,[RBP+40h],MASK=K4
|000000B8:62F26D18B64D10<2       | VFMADDSUB321PS XMM1,XMM2,[RBP+40h],BCST=ON
|000000BF:C4E26DB6CB             | VFMADDSUB321PS YMM1,YMM2,YMM3
|000000C4:C4E26DB64D40           | VFMADDSUB321PS YMM1,YMM2,[RBP+40h]
|000000CA:62F26DACB64D02<5       | VFMADDSUB321PS YMM1,YMM2,[RBP+40h],MASK=K4,ZEROING=ON
|000000D1:62F26D38B64D10<2       | VFMADDSUB321PS YMM1,YMM2,[RBP+40h],BCST=ON
|000000D8:62F26D48B6CB           | VFMADDSUB321PS ZMM1,ZMM2,ZMM3
|000000DE:62F26D78B6CB           | VFMADDSUB321PS ZMM1,ZMM2,ZMM3,ROUND=ZERO
|000000E4:62F26D48B64D01<6       | VFMADDSUB321PS ZMM1,ZMM2,[RBP+40h]
|000000EB:62F26DCCB64D01<6       | VFMADDSUB321PS ZMM1,ZMM2,[RBP+40h],MASK=K4,ZEROING=ON
|000000F2:62F26D58B64D10<2       | VFMADDSUB321PS ZMM1,ZMM2,[RBP+40h],BCST=ON
|000000F9:C4E2E996CB             | VFMADDSUB312PD XMM1,XMM2,XMM3
|000000FE:C4E2E9964D40           | VFMADDSUB312PD XMM1,XMM2,[RBP+40h]
|00000104:62F2ED0C964D04<4       | VFMADDSUB312PD XMM1,XMM2,[RBP+40h],MASK=K4
|0000010B:62F2ED18964D08<3       | VFMADDSUB312PD XMM1,XMM2,[RBP+40h],BCST=ON
|00000112:C4E2ED96CB             | VFMADDSUB312PD YMM1,YMM2,YMM3
|00000117:C4E2ED964D40           | VFMADDSUB312PD YMM1,YMM2,[RBP+40h]
|0000011D:62F2EDAC964D02<5       | VFMADDSUB312PD YMM1,YMM2,[RBP+40h],MASK=K4,ZEROING=ON
|00000124:62F2ED38964D08<3       | VFMADDSUB312PD YMM1,YMM2,[RBP+40h],BCST=ON
|0000012B:62F2ED4896CB           | VFMADDSUB312PD ZMM1,ZMM2,ZMM3
|00000131:62F2ED7896CB           | VFMADDSUB312PD ZMM1,ZMM2,ZMM3,ROUND=ZERO
|00000137:62F2ED48964D01<6       | VFMADDSUB312PD ZMM1,ZMM2,[RBP+40h]
|0000013E:62F2EDCC964D01<6       | VFMADDSUB312PD ZMM1,ZMM2,[RBP+40h],MASK=K4,ZEROING=ON
|00000145:62F2ED58964D08<3       | VFMADDSUB312PD ZMM1,ZMM2,[RBP+40h],BCST=ON
|0000014C:C4E2E9A6CB             | VFMADDSUB123PD XMM1,XMM2,XMM3
|00000151:C4E2E9A64D40           | VFMADDSUB123PD XMM1,XMM2,[RBP+40h]
|00000157:62F2ED0CA64D04<4       | VFMADDSUB123PD XMM1,XMM2,[RBP+40h],MASK=K4
|0000015E:62F2ED18A64D08<3       | VFMADDSUB123PD XMM1,XMM2,[RBP+40h],BCST=ON
|00000165:C4E2EDA6CB             | VFMADDSUB123PD YMM1,YMM2,YMM3
|0000016A:C4E2EDA64D40           | VFMADDSUB123PD YMM1,YMM2,[RBP+40h]
|00000170:62F2EDACA64D02<5       | VFMADDSUB123PD YMM1,YMM2,[RBP+40h],MASK=K4,ZEROING=ON
|00000177:62F2ED38A64D08<3       | VFMADDSUB123PD YMM1,YMM2,[RBP+40h],BCST=ON
|0000017E:62F2ED48A6CB           | VFMADDSUB123PD ZMM1,ZMM2,ZMM3
|00000184:62F2ED78A6CB           | VFMADDSUB123PD ZMM1,ZMM2,ZMM3,ROUND=ZERO
|0000018A:62F2ED48A64D01<6       | VFMADDSUB123PD ZMM1,ZMM2,[RBP+40h]
|00000191:62F2EDCCA64D01<6       | VFMADDSUB123PD ZMM1,ZMM2,[RBP+40h],MASK=K4,ZEROING=ON
|00000198:62F2ED58A64D08<3       | VFMADDSUB123PD ZMM1,ZMM2,[RBP+40h],BCST=ON
|0000019F:C4E2E9B6CB             | VFMADDSUB321PD XMM1,XMM2,XMM3
|000001A4:C4E2E9B64D40           | VFMADDSUB321PD XMM1,XMM2,[RBP+40h]
|000001AA:62F2ED0CB64D04<4       | VFMADDSUB321PD XMM1,XMM2,[RBP+40h],MASK=K4
|000001B1:62F2ED18B64D08<3       | VFMADDSUB321PD XMM1,XMM2,[RBP+40h],BCST=ON
|000001B8:C4E2EDB6CB             | VFMADDSUB321PD YMM1,YMM2,YMM3
|000001BD:C4E2EDB64D40           | VFMADDSUB321PD YMM1,YMM2,[RBP+40h]
|000001C3:62F2EDACB64D02<5       | VFMADDSUB321PD YMM1,YMM2,[RBP+40h],MASK=K4,ZEROING=ON
|000001CA:62F2ED38B64D08<3       | VFMADDSUB321PD YMM1,YMM2,[RBP+40h],BCST=ON
|000001D1:62F2ED48B6CB           | VFMADDSUB321PD ZMM1,ZMM2,ZMM3
|000001D7:62F2ED78B6CB           | VFMADDSUB321PD ZMM1,ZMM2,ZMM3,ROUND=ZERO
|000001DD:62F2ED48B64D01<6       | VFMADDSUB321PD ZMM1,ZMM2,[RBP+40h]
|000001E4:62F2EDCCB64D01<6       | VFMADDSUB321PD ZMM1,ZMM2,[RBP+40h],MASK=K4,ZEROING=ON
|000001EB:62F2ED58B64D08<3       | VFMADDSUB321PD ZMM1,ZMM2,[RBP+40h],BCST=ON
|                                |ENDPROGRAM t5421
 
- Expected messages 
t5421.out
 
I0180 Assembling source file "t5421.htm".
I0270 Assembling source "t5421".
I0310 Assembling source pass 1.
I0330 Assembling source pass 2 - final.
I0470 Assembling program "t5421". "t5421.htm"{64}
I0510 Assembling program pass 1. "t5421.htm"{64}
I0530 Assembling program pass 2 - final. "t5421.htm"{64}
I0660 16bit TINY BIN file "t5421.bin" created, size=498. "t5421.htm"{144}
I0650 Program "t5421" assembled in 2 passes with errorlevel 0. "t5421.htm"{144}
I0750 Source "t5421" (162 lines) assembled in 2 passes with errorlevel 0.
I0860 Listing file "t5421.htm.lst" created, size=6240.
I0990 EuroAssembler terminated with errorlevel 0.
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