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Test t5680: Machine instructions VPMULUDQ VPMULDQ VPMULLD VPMULLQ

Tested procedures

IizVPMULUDQ   IiyVPMULDQ   IiyVPMULLD   IiyVPMULLQ  

Source & expected listing t5680.htm.lst

| |EUROASM LIST=ON,DUMP=ON,DUMPWIDTH=30,CPU=X64,SIMD=AVX512,EVEX=ON,MVEX=ON | |t5680 PROGRAM FORMAT=BIN, LISTMAP=OFF, LISTGLOBALS=OFF |[Mode64] |[Mode64] SEGMENT WIDTH=64,PURPOSE=CODE |00000000:C5E9F4CB | VPMULUDQ XMM1,XMM2,XMM3 |00000004:C5EDF4CB | VPMULUDQ YMM1,YMM2,YMM3 |00000008:C4E169F4CB | VPMULUDQ XMM1,XMM2,XMM3,PREFIX=VEX3 |0000000D:C4E16DF4CB | VPMULUDQ YMM1,YMM2,YMM3,PREFIX=VEX3 |00000012:62F1ED8CF4CB | VPMULUDQ XMM1,XMM2,XMM3,MASK=K4,ZEROING=ON |00000018:62F1EDACF4CB | VPMULUDQ YMM1,YMM2,YMM3,MASK=K4,ZEROING=ON |0000001E:62F1EDCCF4CB | VPMULUDQ ZMM1,ZMM2,ZMM3,MASK=K4,ZEROING=ON |00000024:C5E9F44D40 | VPMULUDQ XMM1,XMM2,[RBP+40h] |00000029:C5EDF44D40 | VPMULUDQ YMM1,YMM2,[RBP+40h] |0000002E:C4E169F44D40 | VPMULUDQ XMM1,XMM2,[RBP+40h],PREFIX=VEX3 |00000034:C4E16DF44D40 | VPMULUDQ YMM1,YMM2,[RBP+40h],PREFIX=VEX3 |0000003A:62F1ED0CF44D04<4 | VPMULUDQ XMM1,XMM2,[RBP+40h],MASK=K4 |00000041:62F1ED2CF44D02<5 | VPMULUDQ YMM1,YMM2,[RBP+40h],MASK=K4 |00000048:62F1ED4CF44D01<6 | VPMULUDQ ZMM1,ZMM2,[RBP+40h],MASK=K4 |0000004F:62F1ED1CF44D08<3 | VPMULUDQ XMM1,XMM2,[RBP+40h],MASK=K4,BCST=ON |00000056:62F1ED3CF44D08<3 | VPMULUDQ YMM1,YMM2,[RBP+40h],MASK=K4,BCST=ON |0000005D:62F1ED5CF44D08<3 | VPMULUDQ ZMM1,ZMM2,[RBP+40h],MASK=K4,BCST=ON |00000064:C4E26928CB | VPMULDQ XMM1,XMM2,XMM3 |00000069:C4E26D28CB | VPMULDQ YMM1,YMM2,YMM3 |0000006E:62F2ED8C28CB | VPMULDQ XMM1,XMM2,XMM3,MASK=K4,ZEROING=ON |00000074:62F2EDAC28CB | VPMULDQ YMM1,YMM2,YMM3,MASK=K4,ZEROING=ON |0000007A:62F2EDCC28CB | VPMULDQ ZMM1,ZMM2,ZMM3,MASK=K4,ZEROING=ON |00000080:C4E269284D40 | VPMULDQ XMM1,XMM2,[RBP+40h] |00000086:C4E26D284D40 | VPMULDQ YMM1,YMM2,[RBP+40h] |0000008C:62F2ED0C284D04<4 | VPMULDQ XMM1,XMM2,[RBP+40h],MASK=K4 |00000093:62F2ED2C284D02<5 | VPMULDQ YMM1,YMM2,[RBP+40h],MASK=K4 |0000009A:62F2ED4C284D01<6 | VPMULDQ ZMM1,ZMM2,[RBP+40h],MASK=K4 |000000A1:62F2ED1C284D08<3 | VPMULDQ XMM1,XMM2,[RBP+40h],MASK=K4,BCST=ON |000000A8:62F2ED3C284D08<3 | VPMULDQ YMM1,YMM2,[RBP+40h],MASK=K4,BCST=ON |000000AF:62F2ED5C284D08<3 | VPMULDQ ZMM1,ZMM2,[RBP+40h],MASK=K4,BCST=ON |000000B6:C4E26940CB | VPMULLD XMM1,XMM2,XMM3 |000000BB:C4E26D40CB | VPMULLD YMM1,YMM2,YMM3 |000000C0:62F26D8C40CB | VPMULLD XMM1,XMM2,XMM3,MASK=K4,ZEROING=ON |000000C6:62F26DAC40CB | VPMULLD YMM1,YMM2,YMM3,MASK=K4,ZEROING=ON |000000CC:62F26DCC40CB | VPMULLD ZMM1,ZMM2,ZMM3,MASK=K4,ZEROING=ON |000000D2:62F2692C40CB | VPMULLD ZMM1,ZMM2,ZMM3,MASK=K4,EH=OFF,OPER=2 ; MVEX {badc}. |000000D8:C4E269404D40 | VPMULLD XMM1,XMM2,[RBP+40h] |000000DE:C4E26D404D40 | VPMULLD YMM1,YMM2,[RBP+40h] |000000E4:62F26D0C404D04<4 | VPMULLD XMM1,XMM2,[RBP+40h],MASK=K4 |000000EB:62F26D2C404D02<5 | VPMULLD YMM1,YMM2,[RBP+40h],MASK=K4 |000000F2:62F26D4C404D01<6 | VPMULLD ZMM1,ZMM2,[RBP+40h],MASK=K4 |000000F9:62F26D1C404D10<2 | VPMULLD XMM1,XMM2,[RBP+40h],MASK=K4,BCST=ON |00000100:62F26D3C404D10<2 | VPMULLD YMM1,YMM2,[RBP+40h],MASK=K4,BCST=ON |00000107:62F26D5C404D10<2 | VPMULLD ZMM1,ZMM2,[RBP+40h],MASK=K4,BCST=ON |0000010E:62F26908404D01<6 | VPMULLD ZMM1,ZMM2,[RBP+40h],PREFIX=MVEX,OPER=0 ; {16to16}. |00000115:62F26918404D10<2 | VPMULLD ZMM1,ZMM2,[RBP+40h],PREFIX=MVEX,OPER=1 ; {1to16}. |0000011C:62F26928404D04<4 | VPMULLD ZMM1,ZMM2,[RBP+40h],PREFIX=MVEX,OPER=2 ; {4to16}. |00000123:62F26968404D02<5 | VPMULLD ZMM1,ZMM2,[RBP+40h],PREFIX=MVEX,OPER=6 ; {uint16}. |0000012A:62F2ED8C40CB | VPMULLQ XMM1,XMM2,XMM3,MASK=K4,ZEROING=ON |00000130:62F2EDAC40CB | VPMULLQ YMM1,YMM2,YMM3,MASK=K4,ZEROING=ON |00000136:62F2EDCC40CB | VPMULLQ ZMM1,ZMM2,ZMM3,MASK=K4,ZEROING=ON |0000013C:62F2ED0C404D04<4 | VPMULLQ XMM1,XMM2,[RBP+40h],MASK=K4 |00000143:62F2ED2C404D02<5 | VPMULLQ YMM1,YMM2,[RBP+40h],MASK=K4 |0000014A:62F2ED4C404D01<6 | VPMULLQ ZMM1,ZMM2,[RBP+40h],MASK=K4 |00000151:62F2ED1C404D08<3 | VPMULLQ XMM1,XMM2,[RBP+40h],MASK=K4,BCST=ON |00000158:62F2ED3C404D08<3 | VPMULLQ YMM1,YMM2,[RBP+40h],MASK=K4,BCST=ON |0000015F:62F2ED5C404D08<3 | VPMULLQ ZMM1,ZMM2,[RBP+40h],MASK=K4,BCST=ON | |ENDPROGRAM t5680

Expected messages t5680.out

I0180 Assembling source file "t5680.htm". I0270 Assembling source "t5680". I0310 Assembling source pass 1. I0330 Assembling source pass 2 - final. I0470 Assembling program "t5680". "t5680.htm"{58} I0510 Assembling program pass 1. "t5680.htm"{58} I0530 Assembling program pass 2 - final. "t5680.htm"{58} I0660 16bit TINY BIN file "t5680.bin" created, size=358. "t5680.htm"{117} I0650 Program "t5680" assembled in 2 passes with errorlevel 0. "t5680.htm"{117} I0750 Source "t5680" (135 lines) assembled in 2 passes with errorlevel 0. I0860 Listing file "t5680.htm.lst" created, size=4363. I0990 EuroAssembler terminated with errorlevel 0.