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Test t5228: Machine instructions VCVTDQ2PS VCVTUDQ2PS VCVTQQ2PS VCVTUQQ2PS VCVTPH2PS VCVTPD2PS

Tested procedures

IizVCVTDQ2PS   IizVCVTUDQ2PS   IizVCVTQQ2PS   IizVCVTUQQ2PS   IizVCVTPH2PS   IizVCVTPD2PS  

Source & expected listing t5228.htm.lst

| | EUROASM LIST=ON, DUMP=ON, DUMPWIDTH=28, CPU=X64, SIMD=AVX512, EVEX=ON | |t5228 PROGRAM FORMAT=BIN, LISTMAP=OFF, LISTGLOBALS=OFF |[Mode64] |[Mode64] SEGMENT WIDTH=64,PURPOSE=CODE |00000000:C5F85BCA | VCVTDQ2PS XMM1,XMM2 |00000004:62F17C8B5BCA | VCVTDQ2PS XMM1,XMM2,MASK=K3,ZEROING=ON |0000000A:C5F85B0E | VCVTDQ2PS XMM1,[RSI] |0000000E:62F17C9B5B0E | VCVTDQ2PS XMM1,[RSI],MASK=K3,ZEROING=ON,BCST=ON |00000014:C5FC5BCA | VCVTDQ2PS YMM1,YMM2 |00000018:62F17CAB5BCA | VCVTDQ2PS YMM1,YMM2,MASK=K3,ZEROING=ON |0000001E:C5FC5B0E | VCVTDQ2PS YMM1,[RSI] |00000022:62F17C385B0E | VCVTDQ2PS YMM1,[RSI],BCST=ON |00000028:62F17C485BCA | VCVTDQ2PS ZMM1,ZMM2 |0000002E:62F17CDB5BCA | VCVTDQ2PS ZMM1,ZMM2,MASK=K3,ZEROING=ON,ROUND=UP |00000034:62F17C485B0E | VCVTDQ2PS ZMM1,[RSI] |0000003A:62F17CDB5B0E | VCVTDQ2PS ZMM1,[RSI],MASK=K3,ZEROING=ON,BCST=ON |00000040:62F17F087ACA | VCVTUDQ2PS XMM1,XMM2 |00000046:62F17F087A0E | VCVTUDQ2PS XMM1,[RSI] |0000004C:62F17F287ACA | VCVTUDQ2PS YMM1,YMM2 |00000052:62F17F287A0E | VCVTUDQ2PS YMM1,[RSI] |00000058:62F17F487ACA | VCVTUDQ2PS ZMM1,ZMM2 |0000005E:62F17F187ACA | VCVTUDQ2PS ZMM1,ZMM2,ROUND=NEAR |00000064:62F17F487A0E | VCVTUDQ2PS ZMM1,[RSI] |0000006A:62F17F587A0E | VCVTUDQ2PS ZMM1,[RSI],BCST=ON |00000070:62F1FC085BCA | VCVTQQ2PS XMM1,XMM2 |00000076:62F1FC0B5BCA | VCVTQQ2PS XMM1,XMM2,MASK=K3 |0000007C:62F1FC285BCA | VCVTQQ2PS XMM1,YMM2 |00000082:62F1FCAB5BCA | VCVTQQ2PS XMM1,YMM2,MASK=K3,ZEROING=ON |00000088:62F1FC085B0E | VCVTQQ2PS XMM1,[RSI],DATA=OWORD |0000008E:62F1FC285B0E | VCVTQQ2PS XMM1,[RSI],DATA=YWORD |00000094:62F1FC1B5B0E | VCVTQQ2PS XMM1,[RSI],MASK=K3,BCST=ON,DATA=OWORD |0000009A:62F1FC3B5B0E | VCVTQQ2PS XMM1,[RSI],MASK=K3,BCST=ON,DATA=YWORD |000000A0:62F1FC9B5B0E | VCVTQQ2PS XMM1,[RSI],MASK=K3,ZEROING=ON,BCST=ON,DATA=OWORD |000000A6:62F1FC485BCA | VCVTQQ2PS YMM1,ZMM2 |000000AC:62F1FC385BCA | VCVTQQ2PS YMM1,ZMM2,ROUND=DOWN |000000B2:62F1FC485B0E | VCVTQQ2PS YMM1,[RSI] |000000B8:62F1FCDB5B0E | VCVTQQ2PS YMM1,[RSI],MASK=K3,ZEROING=ON,BCST=ON |000000BE:62F1FF087A0E | VCVTUQQ2PS XMM1,[RSI],DATA=OWORD |000000C4:62F1FF287A0E | VCVTUQQ2PS XMM1,[RSI],DATA=YWORD |000000CA:62F1FF187A0E | VCVTUQQ2PS XMM1,[RSI],DATA=OWORD,BCST=ON |000000D0:62F1FF387A0E | VCVTUQQ2PS XMM1,[RSI],DATA=YWORD,BCST=ON |000000D6:62F1FF087ACA | VCVTUQQ2PS XMM1,XMM2 |000000DC:62F1FF287ACA | VCVTUQQ2PS XMM1,YMM2 |000000E2:62F1FF487ACA | VCVTUQQ2PS YMM1,ZMM2 |000000E8:62F1FF4B7ACA | VCVTUQQ2PS YMM1,ZMM2,MASK=K3 |000000EE:62F1FFBB7ACA | VCVTUQQ2PS YMM1,ZMM2,MASK=K3,ZEROING=ON,ROUND=DOWN |000000F4:62F1FF487A0E | VCVTUQQ2PS YMM1,[RSI] | |EUROASM SPEC=ENABLE |000000FA:62F1FF587A0E | VCVTUQQ2PS YMM1,[RSI],BCST=ON |00000100:C4E27913CA | VCVTPH2PS XMM1,XMM2 |00000105:C4E279130E | VCVTPH2PS XMM1,[RSI] |0000010A:62F27D0B13CA | VCVTPH2PS XMM1,XMM2,MASK=K3 |00000110:62F27D8A130E | VCVTPH2PS XMM1,[RSI],MASK=K2,ZEROING=ON |00000116:C4E27D13CA | VCVTPH2PS YMM1,XMM2 |0000011B:C4E27D130E | VCVTPH2PS YMM1,[RSI] |00000120:62F27D5813CA | VCVTPH2PS ZMM1,YMM2,SAE=ON |00000126:62F27D4A130E | VCVTPH2PS ZMM1,[RSI],MASK=K2 |0000012C:C5F95ACA | VCVTPD2PS XMM1,XMM2 |00000130:62F1FD0B5ACA | VCVTPD2PS XMM1,XMM2,MASK=K3,PREFIX=EVEX |00000136:C5FD5ACA | VCVTPD2PS XMM1,YMM2 |0000013A:62F1FDAB5ACA | VCVTPD2PS XMM1,YMM2,MASK=K3,ZEROING=ON |00000140:C5F95A0E | VCVTPD2PS XMM1,[RSI],DATA=OWORD |00000144:C5FD5A0E | VCVTPD2PS XMM1,[RSI],DATA=YWORD |00000148:62F1FD385ACA | VCVTPD2PS YMM1,ZMM2,ROUND=DOWN |0000014E:62F1FD485A0E | VCVTPD2PS YMM1,[RSI] |00000154:62F1FD5B5A0E | VCVTPD2PS YMM1,[RSI],BCST=ON,MASK=K3 | | EUROASM MVEX=ENABLE |0000015A:62F1F9085ACA | VCVTPD2PS ZMM1,ZMM2 |00000160:62F1F9185ACA | VCVTPD2PS ZMM1,ZMM2,EH=OFF,OPER=1 ; PREFIX=MVEX, swap innter pairs. |00000166:62F1F9B85ACA | VCVTPD2PS ZMM1,ZMM2,EH=ON,OPER=3 ; ROUND=ZERO, PREFIX=MVEX. |0000016C:62F1F90B5ACA | VCVTPD2PS ZMM1,ZMM2,MASK=K3 |00000172:62F1F9085A0E | VCVTPD2PS ZMM1,[RSI] |00000178:62F1F9285A0E | VCVTPD2PS ZMM1,[RSI],OPER=2 ; Broadcasting {4to8} | |ENDPROGRAM t5228

Expected messages t5228.out

I0180 Assembling source file "t5228.htm". I0270 Assembling source "t5228". I0310 Assembling source pass 1. I0330 Assembling source pass 2 - final. I0470 Assembling program "t5228". "t5228.htm"{64} I0510 Assembling program pass 1. "t5228.htm"{64} I0530 Assembling program pass 2 - final. "t5228.htm"{64} I0660 16bit TINY BIN file "t5228.bin" created, size=382. "t5228.htm"{135} I0650 Program "t5228" assembled in 2 passes with errorlevel 0. "t5228.htm"{135} I0750 Source "t5228" (153 lines) assembled in 2 passes with errorlevel 0. I0860 Listing file "t5228.htm.lst" created, size=4486. I0990 EuroAssembler terminated with errorlevel 0.