Test t5226:
Machine instructions VCVTPS2QQ VCVTTPS2QQ VCVTPD2QQ VCVTTPD2QQ VCVTPS2UQQ VCVTTPS2UQQ VCVTPD2UQQ VCVTTPD2UQQ
- Tested procedures
-
IizVCVTPS2QQ
IizVCVTTPS2QQ
IizVCVTPD2QQ
IizVCVTTPD2QQ
IizVCVTPS2UQQ
IizVCVTTPS2UQQ
IizVCVTPD2UQQ
IizVCVTTPD2UQQ
- Source & expected listing
t5226.htm.lst
-
| | EUROASM LIST=ON, DUMP=ON, DUMPWIDTH=28, CPU=X64, SIMD=AVX512, EVEX=ON
| |t5226 PROGRAM FORMAT=BIN, LISTMAP=OFF, LISTGLOBALS=OFF
|[Mode64] |[Mode64] SEGMENT WIDTH=64,PURPOSE=CODE
|00000000:62F17D087BCA | VCVTPS2QQ XMM1,XMM2
|00000006:62F17D087B4D08<3 | VCVTPS2QQ XMM1,[RBP+40h]
|0000000D:62F17D287BCA | VCVTPS2QQ YMM1,XMM2
|00000013:62F17D287B4D04<4 | VCVTPS2QQ YMM1,[RBP+40h]
|0000001A:62F17D4B7BCA | VCVTPS2QQ ZMM1,YMM2,MASK=K3
|00000020:62F17D387BCA | VCVTPS2QQ ZMM1,YMM2,ROUND=DOWN
|00000026:62F17D487B4D02<5 | VCVTPS2QQ ZMM1,[RBP+40h]
|0000002D:62F17D587B4D10<2 | VCVTPS2QQ ZMM1,[RBP+40h],BCST=ON
|00000034:62F17D087ACA | VCVTTPS2QQ XMM1,XMM2
|0000003A:62F17D087A4D08<3 | VCVTTPS2QQ XMM1,[RBP+40h]
|00000041:62F17D287ACA | VCVTTPS2QQ YMM1,XMM2
|00000047:62F17D287A4D04<4 | VCVTTPS2QQ YMM1,[RBP+40h]
|0000004E:62F17D4B7ACA | VCVTTPS2QQ ZMM1,YMM2,MASK=K3
|00000054:62F17D587ACA | VCVTTPS2QQ ZMM1,YMM2,SAE=ON
|0000005A:62F17D487A4D02<5 | VCVTTPS2QQ ZMM1,[RBP+40h]
|00000061:62F17D587A4D10<2 | VCVTTPS2QQ ZMM1,[RBP+40h],BCST=ON
|00000068:62F1FD087BCA | VCVTPD2QQ XMM1,XMM2
|0000006E:62F1FD087B4D04<4 | VCVTPD2QQ XMM1,[RBP+40h]
|00000075:62F1FD287BCA | VCVTPD2QQ YMM1,YMM2
|0000007B:62F1FD287B4D02<5 | VCVTPD2QQ YMM1,[RBP+40h]
|00000082:62F1FD387B4D08<3 | VCVTPD2QQ YMM1,[RBP+40h],BCST=ON
|00000089:62F1FD487BCA | VCVTPD2QQ ZMM1,ZMM2
|0000008F:62F1FD4B7BCA | VCVTPD2QQ ZMM1,ZMM2,MASK=K3
|00000095:62F1FD9B7BCA | VCVTPD2QQ ZMM1,ZMM2,MASK=K3,ROUND=NEAR,ZEROING=ON
|0000009B:62F1FD487B4D01<6 | VCVTPD2QQ ZMM1,[RBP+40h]
|000000A2:62F1FD587B4D08<3 | VCVTPD2QQ ZMM1,[RBP+40h],BCST=ON
|000000A9:62F1FD087ACA | VCVTTPD2QQ XMM1,XMM2
|000000AF:62F1FD087A4D04<4 | VCVTTPD2QQ XMM1,[RBP+40h]
|000000B6:62F1FD287ACA | VCVTTPD2QQ YMM1,YMM2
|000000BC:62F1FD287A4D02<5 | VCVTTPD2QQ YMM1,[RBP+40h]
|000000C3:62F1FD387A4D08<3 | VCVTTPD2QQ YMM1,[RBP+40h],BCST=ON
|000000CA:62F1FD487ACA | VCVTTPD2QQ ZMM1,ZMM2
|000000D0:62F1FD4B7ACA | VCVTTPD2QQ ZMM1,ZMM2,MASK=K3
|000000D6:62F1FDDB7ACA | VCVTTPD2QQ ZMM1,ZMM2,MASK=K3,SAE=ON,ZEROING=ON
|000000DC:62F1FD487A4D01<6 | VCVTTPD2QQ ZMM1,[RBP+40h]
|000000E3:62F1FD587A4D08<3 | VCVTTPD2QQ ZMM1,[RBP+40h],BCST=ON
|000000EA:62F17D0879CA | VCVTPS2UQQ XMM1,XMM2
|000000F0:62F17D08794D08<3 | VCVTPS2UQQ XMM1,[RBP+40h]
|000000F7:62F17D2879CA | VCVTPS2UQQ YMM1,XMM2
|000000FD:62F17D28794D04<4 | VCVTPS2UQQ YMM1,[RBP+40h]
|00000104:62F17D4B79CA | VCVTPS2UQQ ZMM1,YMM2,MASK=K3
|0000010A:62F17D3879CA | VCVTPS2UQQ ZMM1,YMM2,ROUND=DOWN
|00000110:62F17D48794D02<5 | VCVTPS2UQQ ZMM1,[RBP+40h]
|00000117:62F17D58794D10<2 | VCVTPS2UQQ ZMM1,[RBP+40h],BCST=ON
|0000011E:62F17D0878CA | VCVTTPS2UQQ XMM1,XMM2
|00000124:62F17D08784D08<3 | VCVTTPS2UQQ XMM1,[RBP+40h]
|0000012B:62F17D18784D10<2 | VCVTTPS2UQQ XMM1,[RBP+40h],BCST=ON
|00000132:62F17D2878CA | VCVTTPS2UQQ YMM1,XMM2
|00000138:62F17D28784D04<4 | VCVTTPS2UQQ YMM1,[RBP+40h]
|0000013F:62F17D4878CA | VCVTTPS2UQQ ZMM1,YMM2
|00000145:62F17D4B78CA | VCVTTPS2UQQ ZMM1,YMM2,MASK=K3
|0000014B:62F17DDB78CA | VCVTTPS2UQQ ZMM1,YMM2,MASK=K3,SAE=ON,ZEROING=ON
|00000151:62F17D48784D02<5 | VCVTTPS2UQQ ZMM1,[RBP+40h]
|00000158:62F17D58784D10<2 | VCVTTPS2UQQ ZMM1,[RBP+40h],BCST=ON
|0000015F:62F1FD0879CA | VCVTPD2UQQ XMM1,XMM2
|00000165:62F1FD08794D04<4 | VCVTPD2UQQ XMM1,[RBP+40h]
|0000016C:62F1FD2879CA | VCVTPD2UQQ YMM1,YMM2
|00000172:62F1FD28794D02<5 | VCVTPD2UQQ YMM1,[RBP+40h]
|00000179:62F1FD38794D08<3 | VCVTPD2UQQ YMM1,[RBP+40h],BCST=ON
|00000180:62F1FD4879CA | VCVTPD2UQQ ZMM1,ZMM2
|00000186:62F1FD4B79CA | VCVTPD2UQQ ZMM1,ZMM2,MASK=K3
|0000018C:62F1FD9B79CA | VCVTPD2UQQ ZMM1,ZMM2,MASK=K3,ROUND=NEAR,ZEROING=ON
|00000192:62F1FD48794D01<6 | VCVTPD2UQQ ZMM1,[RBP+40h]
|00000199:62F1FD58794D08<3 | VCVTPD2UQQ ZMM1,[RBP+40h],BCST=ON
|000001A0:62F1FD0878CA | VCVTTPD2UQQ XMM1,XMM2
|000001A6:62F1FD08784D04<4 | VCVTTPD2UQQ XMM1,[RBP+40h]
|000001AD:62F1FD2878CA | VCVTTPD2UQQ YMM1,YMM2
|000001B3:62F1FD28784D02<5 | VCVTTPD2UQQ YMM1,[RBP+40h]
|000001BA:62F1FD4878CA | VCVTTPD2UQQ ZMM1,ZMM2
|000001C0:62F1FD4B78CA | VCVTTPD2UQQ ZMM1,ZMM2,MASK=K3
|000001C6:62F1FDDB78CA | VCVTTPD2UQQ ZMM1,ZMM2,MASK=K3,SAE=ON,ZEROING=ON
|000001CC:62F1FD48784D01<6 | VCVTTPD2UQQ ZMM1,[RBP+40h]
|000001D3:62F1FD58784D08<3 | VCVTTPD2UQQ ZMM1,[RBP+40h],BCST=ON
| |ENDPROGRAM t5226
- Expected messages
t5226.out
I0180 Assembling source file "t5226.htm".
I0270 Assembling source "t5226".
I0310 Assembling source pass 1.
I0330 Assembling source pass 2 - final.
I0470 Assembling program "t5226". "t5226.htm"{70}
I0510 Assembling program pass 1. "t5226.htm"{70}
I0530 Assembling program pass 2 - final. "t5226.htm"{70}
I0660 16bit TINY BIN file "t5226.bin" created, size=474. "t5226.htm"{145}
I0650 Program "t5226" assembled in 2 passes with errorlevel 0. "t5226.htm"{145}
I0750 Source "t5226" (163 lines) assembled in 2 passes with errorlevel 0.
I0860 Listing file "t5226.htm.lst" created, size=4529.
I0990 EuroAssembler terminated with errorlevel 0.
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