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# Test t3550: Machine instructions FADD FMUL FSUB FSUBR FDIV FDIVR

Tested procedures
  IifFADD IifFMUL IifFSUB IifFSUBR IifFDIV IifFDIVR

Source & expected listing t3550.htm.lst
  `| |EUROASM LIST=ON, DUMP=ON, DUMPWIDTH=30, CPU=X64, FPU=ON | |t3550 PROGRAM FORMAT=BIN, LISTMAP=OFF, LISTGLOBALS=OFF |[Mode32] |[Mode32] SEGMENT WIDTH=32,PURPOSE=CODE |00000000:D805[10010000] | FADD ST0,[MemDword] |00000006:D805[10010000] | FADD [MemDword] |0000000C:D805[08010000] | FADD [MemQword],DATA=DWORD |00000012:DC05[08010000] | FADD ST0,[MemQword] |00000018:DC05[08010000] | FADD [MemQword] |0000001E:D8C1 | FADD ST0,ST1 |00000020:D8C1 | FADD |00000022:DCC7 | FADD ST7,ST0 |00000024:DCC7 | FADD ST7 |00000026:D8C0 | FADD ST0,ST0 |00000028:D8C0 | FADD ST0 |0000002A:DCC0 | FADD ST0,CODE=LONG |0000002C:D80D[10010000] | FMUL ST0,[MemDword] |00000032:D80D[10010000] | FMUL [MemDword] |00000038:D80D[08010000] | FMUL [MemQword],DATA=DWORD |0000003E:DC0D[08010000] | FMUL ST0,[MemQword] |00000044:DC0D[08010000] | FMUL [MemQword] |0000004A:D8C9 | FMUL ST0,ST1 |0000004C:D8C9 | FMUL |0000004E:DCCF | FMUL ST7,ST0 |00000050:DCCF | FMUL ST7 |00000052:D8C8 | FMUL ST0,ST0 |00000054:D8C8 | FMUL ST0 |00000056:DCC8 | FMUL ST0,CODE=LONG |00000058:D825[10010000] | FSUB ST0,[MemDword] |0000005E:D825[10010000] | FSUB [MemDword] |00000064:D825[08010000] | FSUB [MemQword],DATA=DWORD |0000006A:DC25[08010000] | FSUB ST0,[MemQword] |00000070:DC25[08010000] | FSUB [MemQword] |00000076:D8E1 | FSUB ST0,ST1 |00000078:D8E1 | FSUB |0000007A:DCEF | FSUB ST7,ST0 |0000007C:DCEF | FSUB ST7 |0000007E:D8E0 | FSUB ST0,ST0 |00000080:D8E0 | FSUB ST0 |00000082:DCE8 | FSUB ST0,CODE=LONG |00000084:D82D[10010000] | FSUBR ST0,[MemDword] |0000008A:D82D[10010000] | FSUBR [MemDword] |00000090:D82D[08010000] | FSUBR [MemQword],DATA=DWORD |00000096:DC2D[08010000] | FSUBR ST0,[MemQword] |0000009C:DC2D[08010000] | FSUBR [MemQword] |000000A2:D8E9 | FSUBR ST0,ST1 |000000A4:D8E9 | FSUBR |000000A6:DCE7 | FSUBR ST7,ST0 |000000A8:DCE7 | FSUBR ST7 |000000AA:D8E8 | FSUBR ST0,ST0 |000000AC:D8E8 | FSUBR ST0 |000000AE:DCE0 | FSUBR ST0,CODE=LONG |000000B0:D835[10010000] | FDIV ST0,[MemDword] |000000B6:D835[10010000] | FDIV [MemDword] |000000BC:D835[08010000] | FDIV [MemQword],DATA=DWORD |000000C2:DC35[08010000] | FDIV ST0,[MemQword] |000000C8:DC35[08010000] | FDIV [MemQword] |000000CE:D8F1 | FDIV ST0,ST1 |000000D0:D8F1 | FDIV |000000D2:DCFF | FDIV ST7,ST0 |000000D4:DCFF | FDIV ST7 |000000D6:D8F0 | FDIV ST0,ST0 |000000D8:D8F0 | FDIV ST0 |000000DA:DCF8 | FDIV ST0,CODE=LONG |000000DC:D83D[10010000] | FDIVR ST0,[MemDword] |000000E2:D83D[10010000] | FDIVR [MemDword] |000000E8:D83D[08010000] | FDIVR [MemQword],DATA=DWORD |000000EE:DC3D[08010000] | FDIVR ST0,[MemQword] |000000F4:DC3D[08010000] | FDIVR [MemQword] |000000FA:D8F9 | FDIVR ST0,ST1 |000000FC:D8F9 | FDIVR |000000FE:DCF7 | FDIVR ST7,ST0 |00000100:DCF7 | FDIVR ST7 |00000102:D8F8 | FDIVR ST0,ST0 |00000104:D8F8 | FDIVR ST0 |00000106:DCF0 | FDIVR ST0,CODE=LONG |00000108:0000000000000000 |MemQword D Q |00000110:00000000 |MemDword D D | |ENDPROGRAM t3550`

Expected messages t3550.out
  `I0180 Assembling source file "t3550.htm". I0270 Assembling source "t3550". I0310 Assembling source pass 1. I0330 Assembling source pass 2 - final. I0470 Assembling program "t3550". "t3550.htm"{64} I0510 Assembling program pass 1. "t3550.htm"{64} I0510 Assembling program pass 2. "t3550.htm"{64} I0510 Assembling program pass 3. "t3550.htm"{64} I0530 Assembling program pass 4 - final. "t3550.htm"{64} I0660 16bit TINY BIN file "t3550.bin" created, size=276. "t3550.htm"{140} I0650 Program "t3550" assembled in 4 passes with errorlevel 0. "t3550.htm"{140} I0750 Source "t3550" (160 lines) assembled in 2 passes with errorlevel 0. I0860 Listing file "t3550.htm.lst" created, size=3790. I0990 EuroAssembler terminated with errorlevel 0.`

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