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# iik.htm
Enumerations
IikList
Instruction handlers
JKNZD JKZD KADDB KADDD KADDQ KADDW KAND KANDB KANDD KANDN KANDNB KANDND KANDNQ KANDNR KANDNW KANDQ KANDW KCONCATH KCONCATL KEXTRACT KMERGE2L1H KMERGE2L1L KMOV KMOVB KMOVD KMOVQ KMOVW KNOT KNOTB KNOTD KNOTQ KNOTW KOR KORB KORD KORQ KORTEST KORTESTB KORTESTD KORTESTQ KORTESTW KORW KSHIFTLB KSHIFTLD KSHIFTLQ KSHIFTLW KSHIFTRB KSHIFTRD KSHIFTRQ KSHIFTRW KTESTB KTESTD KTESTQ KTESTW KUNPCKBW KUNPCKDQ KUNPCKWD KXNOR KXNORB KXNORD KXNORQ KXNORW KXOR KXORB KXORD KXORQ KXORW

↑ IikHandlers
  assemble AVX-512 machine instructions which manipulate with opmask registers K0..K7.
See also
  IiHandlers, [IntelAVX512].

    iik PROGRAM FORMAT=COFF,MODEL=FLAT,WIDTH=32
        INCLUDEHEAD euroasm.htm, \  Interface (structures, symbols and macros) of other modules used in this source.
                    ea.htm,eaopt.htm,exp.htm,ii.htm,msg.htm,pgm.htm,pgmopt.htm,sss.htm,stm.htm,sym.htm

    iik HEAD ; Start of module interface.

↑ %IikList
  enumerates machine instructions of this family which €ASM can assemble.
  Each instruction declared in `%IikList` requires the corresponding handler in this file.
See also
  DictLookupIi

    %IikList %SET \
    JKZD, \
    JKNZD, \
    KMOV, \
    KMOVB, \
    KMOVD, \
    KMOVQ, \
    KMOVW, \
    KSHIFTRB, \
    KSHIFTRD, \
    KSHIFTLB, \
    KSHIFTLD, \
    KSHIFTRW, \
    KSHIFTRQ, \
    KSHIFTLW, \
    KSHIFTLQ, \
    KORTESTB, \
    KORTESTW, \
    KORTESTD, \
    KORTESTQ, \
    KTESTB, \
    KTESTW, \
    KTESTD, \
    KTESTQ, \
    KNOTB, \
    KNOTW, \
    KNOTD, \
    KNOTQ, \
    KORB, \
    KORW, \
    KORD, \
    KORQ, \
    KADDB, \
    KADDW, \
    KADDQ, \
    KADDD, \
    KANDB, \
    KANDW, \
    KANDD, \
    KANDQ, \
    KANDNB, \
    KANDNW, \
    KANDND, \
    KANDNQ, \
    KXNORB, \
    KXNORW, \
    KXNORD, \
    KXNORQ, \
    KXORB, \
    KXORW, \
    KXORD, \
    KXORQ, \
    KUNPCKBW, \
    KUNPCKWD, \
    KUNPCKDQ, \
    KAND, \
    KANDN, \
    KANDNR, \
    KNOT, \
    KOR, \
    KXNOR, \
    KXOR, \
    KMERGE2L1H, \
    KMERGE2L1L, \
    KORTEST, \
    KCONCATH, \
    KCONCATL, \
    KEXTRACT, \

    ;
      ENDHEAD iik  ; End of module interface.

↑ KMOVB
  Move from and to Mask Registers BYTE
Intel reference

  KMOVB k1, k2/m8 | VEX.L0.66.0F.W0 90 /r
  KMOVB m8, k1 | VEX.L0.66.0F.W0 91 /r
  KMOVB k1, r32 | VEX.L0.66.0F.W0 92 /r
  KMOVB r32, k1 | VEX.L0.66.0F.W0 93 /r

Tested by
  t6200

    IikKMOVB:: PROC
        IiEncoding DATA=BYTE
        IiEmitPrefix VEX.L0.66.0F.W0
    .df:IiModRM /r
        IiRequire EVEX
        IiDispatchFormat  krg.krg, krg.mem, mem.krg, krg.r32, r32.krg
    .krg.mem:
    .krg.krg:
        IiEmitOpcode 0x90
        IiOpEn RM
        RET
    .mem.krg:
        IiEmitOpcode 0x91
        IiOpEn MR
        RET
    .krg.r32:
        IiEmitOpcode 0x92
        IiOpEn RM
        RET
    .r32.krg:
        IiEmitOpcode 0x93
        IiOpEn RM
        RET
      ENDP IikKMOVB::

↑ KMOVW
  Move from and to Mask Registers WORD
Intel reference

  KMOVW k1, k2/m16 | VEX.L0.0F.W0 90 /r
  KMOVW m16, k1 | VEX.L0.0F.W0 91 /r
  KMOVW k1, r32 | VEX.L0.0F.W0 92 /r
  KMOVW r32, k1 | VEX.L0.0F.W0 93 /r

Tested by
  t6200

    IikKMOVW:: PROC
        IiEncoding DATA=WORD
        IiEmitPrefix VEX.L0.0F.W0
        JMP IikKMOVB.df:
      ENDP IikKMOVW::

↑ KMOVD
  Move from and to Mask Registers DWORD
Intel reference

  KMOVD k1, k2/m32 | VEX.L0.66.0F.W1 90 /r
  KMOVD m32, k1 | VEX.L0.66.0F.W1 91 /r
  KMOVD k1, r32 | VEX.L0.F2.0F.W0 92 /r
  KMOVD r32, k1 | VEX.L0.F2.0F.W0 93 /r

Tested by
  t6200

    IikKMOVD:: PROC
        IiRequire EVEX
        IiEncoding DATA=DWORD
        IiModRM /r
        IiDispatchFormat  krg.krg, krg.mem, mem.krg, krg.r32, r32.krg
    .krg.krg:
    .krg.mem:
        IiEmitOpcode 0x90
        IiOpEn RM
    .km:IiEmitPrefix VEX.L0.66.0F.W1
        RET
    .mem.krg:
        IiEmitOpcode 0x91
        IiOpEn MR
        JMP .km:
    .krg.r32:
        IiEmitOpcode 0x92
    .kr:IiOpEn RM
        IiEmitPrefix VEX.L0.F2.0F.W0
        RET
    .r32.krg:
        IiEmitOpcode 0x93
        JMP .kr:
      ENDP IikKMOVD::

↑ KMOVQ
  Move from and to Mask Registers QWORD
Intel reference

  KMOVQ k1, k2/m64 | VEX.L0.0F.W1 90 /r
  KMOVQ m64, k1 | VEX.L0.0F.W1 91 /r
  KMOVQ k1, r64 | VEX.L0.F2.0F.W1 92 /r
  KMOVQ r64, k1 | VEX.L0.F2.0F.W1 93 /r

Tested by
  t6200

    IikKMOVQ:: PROC
        IiRequire EVEX
        IiEncoding DATA=QWORD
        IiModRM /r
        IiDispatchFormat  krg.krg, krg.mem, mem.krg, krg.r64, r64.krg
    .krg.krg:
    .krg.mem:
        IiEmitOpcode 0x90
        IiOpEn RM
    .km:IiEmitPrefix VEX.L0.0F.W1
        RET
    .mem.krg:
        IiEmitOpcode 0x91
        IiOpEn MR
        JMP .km:
    .krg.r64:
        IiEmitOpcode 0x92
    .kr:IiOpEn RM
        IiEmitPrefix VEX.L0.F2.0F.W1
        RET
    .r64.krg:
        IiEmitOpcode 0x93
        JMP .kr:
      ENDP IikKMOVQ::

↑ KSHIFTRB
  Shift Right Mask Registers BYTE
Intel reference

  KSHIFTRB k1, k2, imm8 | VEX.L0.66.0F3A.W0 30 /r R

Opcode
  0x30
Tested by
  t6202

    IikKSHIFTRB:: PROC
        IiEmitOpcode 0x30
    .op:IiEncoding DATA=BYTE
    .en:IiOpEn RM
        IiAllowModifier IMM
        IiModRM /r
        IiEmitImm Operand3, BYTE
        IiRequire EVEX
        IiDispatchFormat  krg.krg.imm
    .krg.krg.imm:
        IiEmitPrefix VEX.L0.66.0F3A.W0
        RET
      ENDP IikKSHIFTRB::

↑ KSHIFTRD
  Shift Right Mask Registers DWORD
Intel reference

  KSHIFTRD k1, k2, imm8 | VEX.L0.66.0F3A.W0 31 /r

Opcode
  0x31
Tested by
  t6202

    IikKSHIFTRD:: PROC
        IiEmitOpcode 0x31
        IiEncoding DATA=DWORD
        JMP IikKSHIFTRB.en:
      ENDP IikKSHIFTRD::

↑ KSHIFTLB
  Shift Left Mask Registers BYTE
Intel reference

  KSHIFTLB k1, k2, imm8 | VEX.L0.66.0F3A.W0 32 /r R

Opcode
  0x32
Tested by
  t6202

    IikKSHIFTLB:: PROC
        IiEmitOpcode 0x32
        JMP IikKSHIFTRB.op:
      ENDP IikKSHIFTLB::

↑ KSHIFTLD
  Shift Left Mask Registers DWORD
Intel reference

  KSHIFTLD k1, k2, imm8 | VEX.L0.66.0F3A.W0 33 /r

Opcode
  0x33
Tested by
  t6202

    IikKSHIFTLD:: PROC
        IiEmitOpcode 0x33
        IiEncoding DATA=DWORD
        JMP IikKSHIFTRB.en:
      ENDP IikKSHIFTLD::

↑ KSHIFTRW
  Shift Right Mask Registers WORD
Intel reference

  KSHIFTRW k1, k2, imm8 | VEX.L0.66.0F3A.W1 30 /r

Opcode
  0x30
Tested by
  t6202

    IikKSHIFTRW:: PROC
        IiEmitOpcode 0x30
    .op:IiEncoding DATA=WORD
    .en:IiOpEn RM
        IiAllowModifier IMM
        IiModRM /r
        IiEmitImm Operand3, BYTE
        IiRequire EVEX
        IiDispatchFormat  krg.krg.imm
    .krg.krg.imm:
        IiEmitPrefix VEX.L0.66.0F3A.W1
        RET
      ENDP IikKSHIFTRW::

↑ KSHIFTRQ
  Shift Right Mask Registers QWORD
Intel reference

  KSHIFTRQ k1, k2, imm8 | VEX.L0.66.0F3A.W1 31 /r

Opcode
  0x31
Tested by
  t6202

    IikKSHIFTRQ:: PROC
        IiEmitOpcode 0x31
        IiEncoding DATA=QWORD
        JMP IikKSHIFTRW.en:
      ENDP IikKSHIFTRQ::

↑ KSHIFTLW
  Shift Left Mask Registers WORD
Intel reference

  KSHIFTLW k1, k2, imm8 | VEX.L0.66.0F3A.W1 32 /r

Opcode
  0x32
Tested by
  t6202

    IikKSHIFTLW:: PROC
        IiEmitOpcode 0x32
        JMP IikKSHIFTRW.op:
      ENDP IikKSHIFTLW::

↑ KSHIFTLQ
  Shift Left Mask Registers QWORD
Intel reference

  KSHIFTLQ k1, k2, imm8 | VEX.L0.66.0F3A.W1 33 /r

Opcode
  0x33
Tested by
  t6202

    IikKSHIFTLQ:: PROC
        IiEmitOpcode 0x33
        IiEncoding DATA=QWORD
        JMP IikKSHIFTRW.en:
      ENDP IikKSHIFTLQ::

↑ KORTESTB
  OR Masks And Set Flags BYTE
Intel reference

  KORTESTB k1, k2 | VEX.L0.66.0F.W0 98 /r R

Opcode
  0x98
Tested by
  t6204

    IikKORTESTB:: PROC
        IiEmitOpcode 0x98
    .op:IiEncoding DATA=BYTE
        IiOpEn RM
        IiModRM /r
        IiRequire EVEX
        IiEmitPrefix VEX.L0.66.0F.W0
        IiDispatchFormat  krg.krg
    .krg.krg:
        RET
      ENDP IikKORTESTB::

↑ KORTESTW
  OR Masks And Set Flags WORD
Intel reference

  KORTESTW k1, k2 | VEX.L0.0F.W0 98 /r

Opcode
  0x98
Tested by
  t6204

    IikKORTESTW:: PROC
        IiEmitOpcode 0x98
    .op:IiEncoding DATA=WORD
        IiOpEn RM
        IiModRM /r
        IiRequire EVEX
        IiEmitPrefix VEX.L0.0F.W0
        IiDispatchFormat  krg.krg
    .krg.krg:
        RET
      ENDP IikKORTESTW::

↑ KORTESTD
  OR Masks And Set Flags DWORD
Intel reference

  KORTESTD k1, k2 | VEX.L0.66.0F.W1 98 /r

Opcode
  0x98
Tested by
  t6204

    IikKORTESTD:: PROC
        IiEmitOpcode 0x98
    .op:IiEncoding DATA=DWORD
        IiOpEn RM
        IiModRM /r
        IiRequire EVEX
        IiEmitPrefix VEX.L0.66.0F.W1
        IiDispatchFormat  krg.krg
    .krg.krg:
        RET
      ENDP IikKORTESTD::

↑ KORTESTQ
  OR Masks And Set Flags QWORD
Intel reference

  KORTESTQ k1, k2 | VEX.L0.0F.W1 98 /r

Opcode
  0x98
Tested by
  t6204

    IikKORTESTQ:: PROC
        IiEmitOpcode 0x98
    .op:IiEncoding DATA=QWORD
        IiOpEn RM
        IiModRM /r
        IiRequire EVEX
        IiEmitPrefix VEX.L0.0F.W1
        IiDispatchFormat  krg.krg
    .krg.krg:
        RET
      ENDP IikKORTESTQ::

↑ KTESTB
  Packed Bit Test Masks and Set Flags BYTE
Intel reference

  KTESTB k1, k2 | VEX.L0.66.0F.W0 99 /r

Opcode
  0x99
Tested by
  t6206

    IikKTESTB:: PROC
        IiEmitOpcode 0x99
        JMP IikKORTESTB.op:
      ENDP IikKTESTB::

↑ KTESTW
  Packed Bit Test Masks and Set Flags WORD
Intel reference

  KTESTW k1, k2 | VEX.L0.0F.W0 99 /r

Opcode
  0x99
Tested by
  t6206

    IikKTESTW:: PROC
        IiEmitOpcode 0x99
        JMP IikKORTESTW.op:
      ENDP IikKTESTW::

↑ KTESTD
  Packed Bit Test Masks and Set Flags DWORD
Intel reference

  KTESTD k1, k2 | VEX.L0.66.0F.W1 99 /r

Opcode
  0x99
Tested by
  t6206

    IikKTESTD:: PROC
        IiEmitOpcode 0x99
        JMP IikKORTESTD.op:
      ENDP IikKTESTD::

↑ KTESTQ
  Packed Bit Test Masks and Set Flags QWORD
Intel reference

  KTESTQ k1, k2 | VEX.L0.0F.W1 99 /r

Opcode
  0x99
Tested by
  t6206

    IikKTESTQ:: PROC
        IiEmitOpcode 0x99
        JMP IikKORTESTQ.op:
      ENDP IikKTESTQ::

↑ KNOTB
  NOT Mask Register BYTE
Intel reference

  KNOTB k1, k2 | VEX.L0.66.0F.W0 44 /r

Opcode
  0x44
Tested by
  t6206

    IikKNOTB:: PROC
        IiEmitOpcode 0x44
        JMP IikKORTESTB.op:
      ENDP IikKNOTB::

↑ KNOTW
  NOT Mask Register WORD
Intel reference

  KNOTW k1, k2 | VEX.L0.0F.W0 44 /r

Opcode
  0x44
Tested by
  t6206

    IikKNOTW:: PROC
        IiEmitOpcode 0x44
        JMP IikKORTESTW.op:
      ENDP IikKNOTW::

↑ KNOTD
  NOT Mask Register DWORD
Intel reference

  KNOTD k1, k2 | VEX.L0.66.0F.W1 44 /r

Opcode
  0x44
Tested by
  t6206

    IikKNOTD:: PROC
        IiEmitOpcode 0x44
        JMP IikKORTESTD.op:
      ENDP IikKNOTD::

↑ KNOTQ
  NOT Mask Register QWORD
Intel reference

  KNOTQ k1, k2 | VEX.L0.0F.W1 44 /r

Opcode
  0x44
Tested by
  t6206

    IikKNOTQ:: PROC
        IiEmitOpcode 0x44
        JMP IikKORTESTQ.op:
      ENDP IikKNOTQ::

↑ KORB
  Bitwise Logical OR Masks BYTE
Intel reference

  KORB k1, k2, k3 | VEX.L1.66.0F.W0 45 /r

Opcode
  0x45
Tested by
  t6212

    IikKORB:: PROC
        IiEmitOpcode 0x45
    .op:IiEncoding DATA=BYTE
        IiOpEn RVM
        IiModRM /r
        IiRequire EVEX
        IiEmitPrefix VEX.L1.66.0F.W0
        IiDispatchFormat  krg.krg.krg
    .krg.krg.krg:
        RET
      ENDP IikKORB::

↑ KORW
  Bitwise Logical OR Masks WORD
Intel reference

  KORW k1, k2, k3 | VEX.NDS.L1.0F.W0 45 /r

Opcode
  0x45
Tested by
  t6212

    IikKORW:: PROC
        IiEmitOpcode 0x45
    .op:IiEncoding DATA=WORD
        IiOpEn RVM
        IiModRM /r
        IiRequire EVEX
        IiEmitPrefix VEX.NDS.L1.0F.W0
        IiDispatchFormat  krg.krg.krg
    .krg.krg.krg:
        RET
      ENDP IikKORW::

↑ KORD
  Bitwise Logical OR Masks DWORD
Intel reference

  KORD k1, k2, k3 | VEX.L1.66.0F.W1 45 /r

Opcode
  0x45
Tested by
  t6212

    IikKORD:: PROC
        IiEmitOpcode 0x45
    .op:IiEncoding DATA=DWORD
        IiOpEn RVM
        IiModRM /r
        IiRequire EVEX
        IiEmitPrefix VEX.L1.66.0F.W1
        IiDispatchFormat  krg.krg.krg
    .krg.krg.krg:
        RET
      ENDP IikKORD::

↑ KORQ
  Bitwise Logical OR Masks QWORD
Intel reference

  KORQ k1, k2, k3 | VEX.L1.0F.W1 45 /r

Opcode
  0x45
Tested by
  t6212

    IikKORQ:: PROC
        IiEmitOpcode 0x45
    .op:IiEncoding DATA=QWORD
        IiOpEn RVM
        IiModRM /r
        IiRequire EVEX
        IiEmitPrefix VEX.L1.0F.W1
        IiDispatchFormat  krg.krg.krg
    .krg.krg.krg:
        RET
      ENDP IikKORQ::

↑ KADDB
  ADD Two Masks BYTE
Intel reference

  KADDB k1, k2, k3 | VEX.L1.66.0F.W0 4A /r

Opcode
  0x4A
Tested by
  t6210

    IikKADDB:: PROC
        IiEmitOpcode 0x4A
        JMP IikKORB.op:
      ENDP IikKADDB::

↑ KADDW
  ADD Two Masks WORD
Intel reference

  KADDW k1, k2, k3 | VEX.L1.0F.W0 4A /r

Opcode
  0x4A
Tested by
  t6210

    IikKADDW:: PROC
        IiEmitOpcode 0x4A
        JMP IikKORW.op:
      ENDP IikKADDW::

↑ KADDD
  ADD Two Masks DWORD
Intel reference

  KADDD k1, k2, k3 | VEX.L1.66.0F.W1 4A /r

Opcode
  0x4A
Tested by
  t6210

    IikKADDD:: PROC
        IiEmitOpcode 0x4A
        JMP IikKORD.op:
      ENDP IikKADDD::

↑ KADDQ
  ADD Two Masks QWORD
Intel reference

  KADDQ k1, k2, k3 | VEX.L1.0F.W1 4A /r

Opcode
  0x4A
Tested by
  t6210

    IikKADDQ:: PROC
        IiEmitOpcode 0x4A
        JMP IikKORQ.op:
      ENDP IikKADDQ::

↑ KANDB
  Bitwise Logical AND Masks BYTE
Intel reference

  KANDB k1, k2, k3 | VEX.L1.66.0F.W0 41 /r

Opcode
  0x41
Tested by
  t6210

    IikKANDB:: PROC
        IiEmitOpcode 0x41
        JMP IikKORB.op:
      ENDP IikKANDB::

↑ KANDW
  Bitwise Logical AND Masks WORD
Intel reference

  KANDW k1, k2, k3 | VEX.NDS.L1.0F.W0 41 /r

Opcode
  0x41
Tested by
  t6210

    IikKANDW:: PROC
        IiEmitOpcode 0x41
        JMP IikKORW.op:
      ENDP IikKANDW::

↑ KANDD
  Bitwise Logical AND Masks DWORD
Intel reference

  KANDD k1, k2, k3 | VEX.L1.66.0F.W1 41 /r

Opcode
  0x41
Tested by
  t6210

    IikKANDD:: PROC
        IiEmitOpcode 0x41
        JMP IikKORD.op:
      ENDP IikKANDD::

↑ KANDQ
  Bitwise Logical AND Masks QWORD
Intel reference

  KANDQ k1, k2, k3 | VEX.L1.0F.W1 41 /r

Opcode
  0x41
Tested by
  t6210

    IikKANDQ:: PROC
        IiEmitOpcode 0x41
        JMP IikKORQ.op:
      ENDP IikKANDQ::

↑ KANDNB
  Bitwise Logical AND NOT Masks BYTE
Intel reference

  KANDNB k1, k2, k3 | VEX.L1.66.0F.W0 42 /r

Opcode
  0x42
Tested by
  t6212

    IikKANDNB:: PROC
        IiEmitOpcode 0x42
        JMP IikKORB.op:
      ENDP IikKANDNB::

↑ KANDNW
  Bitwise Logical AND NOT Masks WORD
Intel reference

  KANDNW k1, k2, k3 | VEX.NDS.L1.0F.W0 42 /r

Opcode
  0x42
Tested by
  t6212

    IikKANDNW:: PROC
        IiEmitOpcode 0x42
        JMP IikKORW.op:
      ENDP IikKANDNW::

↑ KANDND
  Bitwise Logical AND NOT Masks DWORD
Intel reference

  KANDND k1, k2, k3 | VEX.L1.66.0F.W1 42 /r

Opcode
  0x42
Tested by
  t6212

    IikKANDND:: PROC
        IiEmitOpcode 0x42
        JMP IikKORD.op:
      ENDP IikKANDND::

↑ KANDNQ
  Bitwise Logical AND NOT Masks QWORD
Intel reference

  KANDNQ k1, k2, k3 | VEX.L1.0F.W1 42 /r

Opcode
  0x42
Tested by
  t6212

    IikKANDNQ:: PROC
        IiEmitOpcode 0x42
        JMP IikKORQ.op:
      ENDP IikKANDNQ::

↑ KXNORB
  Bitwise Logical XNOR Masks BYTE
Intel reference

  KXNORB k1, k2, k3 | VEX.L1.66.0F.W0 46 /r

Opcode
  0x46
Tested by
  t6214

    IikKXNORB:: PROC
        IiEmitOpcode 0x46
        JMP IikKORB.op:
      ENDP IikKXNORB::

↑ KXNORW
  Bitwise Logical XNOR Masks WORD
Intel reference

  KXNORW k1, k2, k3 | VEX.NDS.L1.0F.W0 46 /r

Opcode
  0x46
Tested by
  t6214

    IikKXNORW:: PROC
        IiEmitOpcode 0x46
        JMP IikKORW.op:
      ENDP IikKXNORW::

↑ KXNORD
  Bitwise Logical XNOR Masks DWORD
Intel reference

  KXNORD k1, k2, k3 | VEX.L1.66.0F.W1 46 /r

Opcode
  0x46
Tested by
  t6214

    IikKXNORD:: PROC
        IiEmitOpcode 0x46
        JMP IikKORD.op:
      ENDP IikKXNORD::

↑ KXNORQ
  Bitwise Logical XNOR Masks QWORD
Intel reference

  KXNORQ k1, k2, k3 | VEX.L1.0F.W1 46 /r

Opcode
  0x46
Tested by
  t6214

    IikKXNORQ:: PROC
        IiEmitOpcode 0x46
        JMP IikKORQ.op:
      ENDP IikKXNORQ::

↑ KXORB
  Bitwise Logical XOR Masks BYTE
Intel reference

  KXORB k1, k2, k3 | VEX.L1.66.0F.W0 47 /r

Opcode
  0x47
Tested by
  t6214

    IikKXORB:: PROC
        IiEmitOpcode 0x47
        JMP IikKORB.op:
      ENDP IikKXORB::

↑ KXORW
  Bitwise Logical XOR Masks WORD
Intel reference

  KXORW k1, k2, k3 | VEX.NDS.L1.0F.W0 47 /r

Opcode
  0x47
Tested by
  t6214

    IikKXORW:: PROC
        IiEmitOpcode 0x47
        JMP IikKORW.op:
      ENDP IikKXORW::

↑ KXORD
  Bitwise Logical XOR Masks DWORD
Intel reference

  KXORD k1, k2, k3 | VEX.L1.66.0F.W1 47 /r

Opcode
  0x47
Tested by
  t6214

    IikKXORD:: PROC
        IiEmitOpcode 0x47
        JMP IikKORD.op:
      ENDP IikKXORD::

↑ KXORQ
  Bitwise Logical XOR Masks QWORD
Intel reference

  KXORQ k1, k2, k3 | VEX.L1.0F.W1 47 /r

Opcode
  0x47
Tested by
  t6214

    IikKXORQ:: PROC
        IiEmitOpcode 0x47
        JMP IikKORQ.op:
      ENDP IikKXORQ::

↑ KUNPCKBW
  Unpack for Mask Registers
Intel reference

  KUNPCKBW k1, k2, k3 | VEX.NDS.L1.66.0F.W0 4B /r

Opcode
  0x4B
Tested by
  t6208

    IikKUNPCKBW:: PROC
        IiEmitOpcode 0x4B
        JMP IikKORB.op:
      ENDP IikKUNPCKBW::

↑ KUNPCKWD
  Unpack for Mask Registers
Intel reference

  KUNPCKWD k1, k2, k3 | VEX.NDS.L1.0F.W0 4B /r

Opcode
  0x4B
Tested by
  t6208

    IikKUNPCKWD:: PROC
        IiEmitOpcode 0x4B
        JMP IikKORW.op:
      ENDP IikKUNPCKWD::

↑ KUNPCKDQ
  Unpack for Mask Registers
Intel reference

  KUNPCKDQ k1, k2, k3 | VEX.NDS.L1.0F.W1 4B /r

Opcode
  0x4B
Tested by
  t6208

    IikKUNPCKDQ:: PROC
        IiEmitOpcode 0x4B
        IiEncoding DATA=DWORD
        JMP IikKORQ.op:
      ENDP IikKUNPCKDQ::

↑ KAND
  AND Vector Mask
Intel reference

  KAND k1, k2 | VEX.128.0F.W0 41 /r

Opcode
  0x41
Tested by
  t6220

    IikKAND:: PROC
        IiEmitOpcode 0x41
    .op:IiRequire MVEX
        IiOpEn RM
        IiModRM /r
        IiEmitPrefix VEX.128.0F.W0
        IiDispatchFormat  krg.krg
    .krg.krg:
        RET
      ENDP IikKAND::

↑ KANDN
  AND NOT Vector Mask
Intel reference

  KANDN k1, k2 | VEX.128.0F.W0 42 /r

Opcode
  0x42
Tested by
  t6220

    IikKANDN:: PROC
        IiEmitOpcode 0x42
        JMP IikKAND.op:
      ENDP IikKANDN::

↑ KANDNR
  Reverse AND NOT Vector Mask
Intel reference

  KANDNR k1, k2 | VEX.128.0F.W0 43 /r

Opcode
  0x43
Tested by
  t6220

    IikKANDNR:: PROC
        IiEmitOpcode 0x43
        JMP IikKAND.op:
      ENDP IikKANDNR::

↑ KNOT
  Not Vector Mask
Intel reference

  KNOT k1, k2 | VEX.128.0F.W0 44 /r

Opcode
  0x44
Tested by
  t6220

    IikKNOT:: PROC
        IiEmitOpcode 0x44
        JMP IikKAND.op:
      ENDP IikKNOT::

↑ KOR
  OR Vector Masks
Intel reference

  KOR k1, k2 | VEX.128.0F.W0 45 /r

Opcode
  0x45
Tested by
  t6220

    IikKOR:: PROC
        IiEmitOpcode 0x45
        JMP IikKAND.op:
      ENDP IikKOR::

↑ KXNOR
  XNOR Vector Masks
Intel reference

  KXNOR k1, k2 | VEX.128.0F.W0 46 /r

Opcode
  0x46
Tested by
  t6220

    IikKXNOR:: PROC
        IiEmitOpcode 0x46
        JMP IikKAND.op:
      ENDP IikKXNOR::

↑ KXOR
  XOR Vector Masks
Intel reference

  KXOR k1, k2 | VEX.128.0F.W0 47 /r

Operands
  0x47
Tested by
  t6220

    IikKXOR:: PROC
        IiEmitOpcode 0x47
        JMP IikKAND.op:
      ENDP IikKXOR::

↑ KMERGE2L1H
  Swap and Merge High Element Portion and Low Portion of Vector Masks
Intel reference

  KMERGE2L1H k1, k2 | VEX.128.0F.W0 48 /r

Opcode
  0x48
Tested by
  t6222

    IikKMERGE2L1H:: PROC
        IiEmitOpcode 0x48
        JMP IikKAND.op:
      ENDP IikKMERGE2L1H::

↑ KMERGE2L1L
  Move Low Element Portion into High Portion of Vector Mask
Intel reference

  KMERGE2L1L k1, k2 | VEX.128.0F.W0 49 /r

Opcode
  0x49
Tested by
  t6222

    IikKMERGE2L1L:: PROC
        IiEmitOpcode 0x49
        JMP IikKAND.op:
      ENDP IikKMERGE2L1L::

↑ KORTEST
  OR Vector Mask And Set EFLAGS
Intel reference

  KORTEST k1, k2 | VEX.128.0F.W0 98 /r

Opcode
  0x98
Tested by
  t6222

    IikKORTEST:: PROC
        IiEmitOpcode 0x98
        JMP IikKAND.op:
      ENDP IikKORTEST::

↑ KCONCATH
  Pack and Move High Vector Mask
Intel reference

  KCONCATH r64, k1, k2 | VEX.NDS.128.0F.W0 95 /r

Opcode
  0x95
Tested by
  t6224

    IikKCONCATH:: PROC
        IiEmitOpcode 0x95
    .op:IiRequire MVEX
        IiOpEn RVM
        IiModRM /r
        IiEmitPrefix VEX.NDS.128.0F.W0
        IiDispatchFormat  r64.krg.krg
    .r64.krg.krg:
        RET
      ENDP IikKCONCATH::

↑ KCONCATL
  Pack and Move Low Vector Mask
Intel reference

  KCONCATL r64, k1, k2 | VEX.NDS.128.0F.W0 97 /r

Opcode
  0x97
Tested by
  t6224

    IikKCONCATL:: PROC
        IiEmitOpcode 0x97
        JMP IikKCONCATH.op:
      ENDP IikKCONCATL::

↑ KEXTRACT
  Extract Vector Mask From Register
Intel reference

  KEXTRACT k1, r64, imm8 | VEX.128.66.0F3A.W0 3E /r ib

Opcode
  0x3E
Tested by
  t6224

    IikKEXTRACT:: PROC
        IiEmitOpcode 0x3E
        IiRequire MVEX
        IiAllowModifier IMM
        IiOpEn RM
        IiModRM /r
        IiEmitImm Operand3, BYTE, Max=3
        IiEmitPrefix VEX.128.66.0F3A.W0
        IiDispatchFormat  krg.r64.imm
    .krg.r64.imm:
        RET
      ENDP IikKEXTRACT::

↑ KMOV
  Move Vector Mask
Intel reference

  KMOV k1, k2 | VEX.128.0F.W0 90 /r
  KMOV r32, k2 | VEX.128.0F.W0 93 /r
  KMOV k1, r32 | VEX.128.0F.W0 92 /r

Tested by
  t6226

    IikKMOV:: PROC
        IiRequire MVEX
        IiEncoding DATA=WORD
        IiEmitPrefix VEX.128.0F.W0
        IiOpEn RM
        IiModRM /r
        IiDispatchFormat  krg.krg, r32.krg, krg.r32
    .krg.krg:
        IiEmitOpcode 0x90
        RET
    .r32.krg:
        IiEmitOpcode 0x93
        RET
    .krg.r32:
        IiEmitOpcode 0x92
        RET
      ENDP IikKMOV::

↑ JKZD
  Jump near if mask is zero
Intel reference

  JKZD k1, rel32 | VEX.NDS.128.0F.W0 84 id
  JKZD k1, rel8 | VEX.NDS.128.W0 74 ib

Tested by
  t6230
Invokes
  IiRelocSizeRIP

    IikJKZD:: PROC
        MOV CL,0x74 ; Opcode SHORT.
        MOV CH,0x84 ; Opcode NEAR.
    .op:IiRequire MVEX
        IiAllowModifier DIST,DATA,IMM,ADDR
        IiOpEn V
        IiDispatchFormat krg.imm
    .krg.imm:
         MOV EAX,[EDI+II.Operand2+EXP.Low]
         MOV EDX,[EDI+II.Operand2+EXP.High]
         MOV [EDI+II.ImmLow],EAX
         MOV [EDI+II.ImmHigh],EDX
         MOV EAX,[EDI+II.Operand2+EXP.Sym]
         MOV EDX,[EBX+STM.Section] ; Current section.
         MOV [EDI+II.ImmRelocSym],EAX
         MOV EBP,[EDI+II.Operand2+EXP.Seg] ; Target segment.
         MOV EAX,[EDX+SSS.SegmPtr] ; Segment of the current JKZD instruction.
         MOV [EDI+II.ImmRelocSeg],EBP
         CMP EBP,EAX
         JE .I: ; If EBP=EAX, use intrasegment jump, no RELOC record.
         SetSt [EDI+II.Reloc],iiRelocImmRel ; Otherwise use NEAR jump with relocation.
    .N:  IiEmitPrefix VEX.NDS.128.0F.W0 ; Use NEAR jump.
         SHR ECX,8
         IiEmitOpcode ECX
         IiDispatchWidth BITS64=.N64:, BITS32=.N32:
         IiEmitPrefix OTOGGLE ; This may cause #UD in 16bit mode due to 66h prefix conflict with VEX.
         Msg '6743' ; NEAR mask jump cannot be used in 16bit addressing mode.
    .N32:IiEncoding DIST=NEAR,ADDR=REL,DATA=DWORD,IMM=DWORD
         RET
    .N64:IiEncoding DIST=NEAR,ADDR=REL,DATA=QWORD,IMM=DWORD
         RET
    .I: ; Segments match. Jump is relative without RELOC, it could be short.
         SetSt [EDI+II.Reloc],iiRelocImmRIP ; RIP relative relocation will be solved in IiFlush.
         JSt [EDI+II.MfgExplicit], \ ; Explicit modifiers force NEAR jump, regardless of actual distance.
           iiMfgDIST_NEAR|iiMfgIMM_WORD|iiMfgIMM_DWORD|iiMfgDATA_WORD|iiMfgDATA_DWORD|iiMfgDATA_QWORD,.N:
         Invoke IiRelocSizeRIP::,EDI,EBX ; Inspect Imm-RIP magnitude and set iiMfgIMM_Mask to EAX.
         JNSt EAX,iiMfgIMM_BYTE,.N: ; If the distance is not short, use NEAR dword jump.

      ;  IiEmitPrefix VEX.NDS.128.W0    ; Use SHORT jump.    Error in 20251110 (missing specificator .0F.)
         IiEmitPrefix VEX.NDS.128.0F.W0 ; Use SHORT jump.    Fixed in 2026

         IiEmitOpcode ECX
         IiDispatchWidth BITS64=.S64:
         IiEncoding DIST=SHORT,ADDR=REL,IMM=BYTE,DATA=DWORD
         RET
    .S64:IiEncoding DIST=SHORT,ADDR=REL,IMM=BYTE,DATA=QWORD
         RET
      ENDP IikJKZD::

↑ JKNZD
  Jump near if mask is not zero
Intel reference

  JKNZD k1, rel32 | VEX.NDS.128.0F.W0 85 id
  JKNZD k1, rel8 | VEX.NDS.128.W0 75 ib

Tested by
  t6230

    IikJKNZD:: PROC
        MOV CL,0x75
        MOV CH,0x85
        JMP IikJKZD.op:
      ENDP IikJKNZD::

      ENDPROGRAM iik

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