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# Test t5624: Machine instructions VPSLLW VPSLLD VPSLLQ VPSLLDQ

Tested procedures
  IizVPSLLW IizVPSLLD IizVPSLLQ IizVPSLLDQ

Source & expected listing t5624.htm.lst
  `| |EUROASM LIST=ON,DUMP=ON,DUMPWIDTH=30,CPU=X64,SIMD=AVX512,EVEX=ON,MVEX=ON | |t5624 PROGRAM FORMAT=BIN, LISTMAP=OFF, LISTGLOBALS=OFF |[Mode64] |[Mode64] SEGMENT WIDTH=64,PURPOSE=CODE |00000000:C5E9F1CB | VPSLLW XMM1,XMM2,XMM3 |00000004:C5EDF1CB | VPSLLW YMM1,YMM2,XMM3 |00000008:C4E169F1CB | VPSLLW XMM1,XMM2,XMM3,PREFIX=VEX3 |0000000D:C4E16DF1CB | VPSLLW YMM1,YMM2,XMM3,PREFIX=VEX3 |00000012:62F16D8CF1CB | VPSLLW XMM1,XMM2,XMM3,MASK=K4,ZEROING=ON |00000018:62F16D2CF1CB | VPSLLW YMM1,YMM2,XMM3,MASK=K4 |0000001E:62F16D4CF1CB | VPSLLW ZMM1,ZMM2,XMM3,MASK=K4 |00000024:C5E9F14D40 | VPSLLW XMM1,XMM2,[RBP+40h] |00000029:C5EDF14D40 | VPSLLW YMM1,YMM2,[RBP+40h] |0000002E:C4E169F14D40 | VPSLLW XMM1,XMM2,[RBP+40h],PREFIX=VEX3 |00000034:C4E16DF14D40 | VPSLLW YMM1,YMM2,[RBP+40h],PREFIX=VEX3 |0000003A:62F16D0CF14D04<4 | VPSLLW XMM1,XMM2,[RBP+40h],MASK=K4 |00000041:62F16DACF14D04<4 | VPSLLW YMM1,YMM2,[RBP+40h],MASK=K4,ZEROING=ON |00000048:62F16D4CF14D04<4 | VPSLLW ZMM1,ZMM2,[RBP+40h],MASK=K4 |0000004F:62F17508717504<403 | VPSLLW XMM1,[RBP+40h],3 |00000057:62F1752C717502<503 | VPSLLW YMM1,[RBP+40h],3,MASK=K4 |0000005F:62F175CC717501<603 | VPSLLW ZMM1,[RBP+40h],3,MASK=K4,ZEROING=ON |00000067:C5E9F2CB | VPSLLD XMM1,XMM2,XMM3 |0000006B:C5EDF2CB | VPSLLD YMM1,YMM2,XMM3 |0000006F:C4E169F2CB | VPSLLD XMM1,XMM2,XMM3,PREFIX=VEX3 |00000074:C4E16DF2CB | VPSLLD YMM1,YMM2,XMM3,PREFIX=VEX3 |00000079:62F16D0CF2CB | VPSLLD XMM1,XMM2,XMM3,MASK=K4 |0000007F:62F16D2CF2CB | VPSLLD YMM1,YMM2,XMM3,MASK=K4 |00000085:62F16DCCF2CB | VPSLLD ZMM1,ZMM2,XMM3,MASK=K4,ZEROING=ON |0000008B:62F1712C72F203 | VPSLLD ZMM1,ZMM2,3,MASK=K4,EH=OFF,OPER=2 ; MVEX {badc}. |00000092:C5E9F24D40 | VPSLLD XMM1,XMM2,[RBP+40h] |00000097:C5EDF24D40 | VPSLLD YMM1,YMM2,[RBP+40h] |0000009C:C4E169F24D40 | VPSLLD XMM1,XMM2,[RBP+40h],PREFIX=VEX3 |000000A2:C4E16DF24D40 | VPSLLD YMM1,YMM2,[RBP+40h],PREFIX=VEX3 |000000A8:62F16D0CF24D04<4 | VPSLLD XMM1,XMM2,[RBP+40h],MASK=K4 |000000AF:62F16DACF24D04<4 | VPSLLD YMM1,YMM2,[RBP+40h],MASK=K4,ZEROING=ON |000000B6:62F16D4CF24D04<4 | VPSLLD ZMM1,ZMM2,[RBP+40h],MASK=K4 |000000BD:62F17508727504<403 | VPSLLD XMM1,[RBP+40h],3 |000000C5:62F17528727502<503 | VPSLLD YMM1,[RBP+40h],3 |000000CD:62F17548727501<603 | VPSLLD ZMM1,[RBP+40h],3 |000000D5:62F17518727510<203 | VPSLLD XMM1,[RBP+40h],3,BCST=ON |000000DD:62F17538727510<203 | VPSLLD YMM1,[RBP+40h],3,BCST=ON |000000E5:62F17558727510<203 | VPSLLD ZMM1,[RBP+40h],3,BCST=ON |000000ED:62F175CC727501<603 | VPSLLD ZMM1,[RBP+40h],3,MASK=K4,ZEROING=ON |000000F5:62F1710C727501<603 | VPSLLD ZMM1,[RBP+40h],3,MASK=K4,PREFIX=MVEX,OPER=0 ; {16to16}. |000000FD:62F1711C727510<203 | VPSLLD ZMM1,[RBP+40h],3,MASK=K4,PREFIX=MVEX,OPER=1 ; {1to16}. |00000105:62F1712C727504<403 | VPSLLD ZMM1,[RBP+40h],3,MASK=K4,PREFIX=MVEX,OPER=2 ; {4to16}. |0000010D:62F1716C727502<503 | VPSLLD ZMM1,[RBP+40h],3,MASK=K4,PREFIX=MVEX,OPER=6 ; {uint16}. |00000115:C5E9F3CB | VPSLLQ XMM1,XMM2,XMM3 |00000119:C5EDF3CB | VPSLLQ YMM1,YMM2,XMM3 |0000011D:C4E169F3CB | VPSLLQ XMM1,XMM2,XMM3,PREFIX=VEX3 |00000122:C4E16DF3CB | VPSLLQ YMM1,YMM2,XMM3,PREFIX=VEX3 |00000127:62F1ED8CF3CB | VPSLLQ XMM1,XMM2,XMM3,MASK=K4,ZEROING=ON |0000012D:62F1ED2CF3CB | VPSLLQ YMM1,YMM2,XMM3,MASK=K4 |00000133:62F1ED4CF3CB | VPSLLQ ZMM1,ZMM2,XMM3,MASK=K4 |00000139:C5E9F34D40 | VPSLLQ XMM1,XMM2,[RBP+40h] |0000013E:C5EDF34D40 | VPSLLQ YMM1,YMM2,[RBP+40h] |00000143:C4E169F34D40 | VPSLLQ XMM1,XMM2,[RBP+40h],PREFIX=VEX3 |00000149:C4E16DF34D40 | VPSLLQ YMM1,YMM2,[RBP+40h],PREFIX=VEX3 |0000014F:62F1ED0CF34D04<4 | VPSLLQ XMM1,XMM2,[RBP+40h],MASK=K4 |00000156:62F1EDACF34D04<4 | VPSLLQ YMM1,YMM2,[RBP+40h],MASK=K4,ZEROING=ON |0000015D:62F1ED4CF34D04<4 | VPSLLQ ZMM1,ZMM2,[RBP+40h],MASK=K4 |00000164:62F1F508737504<403 | VPSLLQ XMM1,[RBP+40h],3 |0000016C:62F1F528737502<503 | VPSLLQ YMM1,[RBP+40h],3 |00000174:62F1F548737501<603 | VPSLLQ ZMM1,[RBP+40h],3 |0000017C:62F1F518737508<303 | VPSLLQ XMM1,[RBP+40h],3,BCST=ON |00000184:62F1F538737508<303 | VPSLLQ YMM1,[RBP+40h],3,BCST=ON |0000018C:62F1F558737508<303 | VPSLLQ ZMM1,[RBP+40h],3,BCST=ON |00000194:62F1F5CC737501<603 | VPSLLQ ZMM1,[RBP+40h],3,MASK=K4,ZEROING=ON |0000019C:C5F173FA03 | VPSLLDQ XMM1,XMM2,3 |000001A1:C5F573FA03 | VPSLLDQ YMM1,YMM2,3 |000001A6:C4E17173FA03 | VPSLLDQ XMM1,XMM2,3,PREFIX=VEX3 |000001AC:C4E17573FA03 | VPSLLDQ YMM1,YMM2,3,PREFIX=VEX3 |000001B2:62F1750873FA03 | VPSLLDQ XMM1,XMM2,3,PREFIX=EVEX |000001B9:62F1752873FA03 | VPSLLDQ YMM1,YMM2,3,PREFIX=EVEX |000001C0:62F1754873FA03 | VPSLLDQ ZMM1,ZMM2,3 |000001C7:62F17508737D04<403 | VPSLLDQ XMM1,[RBP+40h],3 |000001CF:62F17528737D02<503 | VPSLLDQ YMM1,[RBP+40h],3 |000001D7:62F17548737D01<603 | VPSLLDQ ZMM1,[RBP+40h],3 | |ENDPROGRAM t5624`

Expected messages t5624.out
  `I0180 Assembling source file "t5624.htm". I0270 Assembling source "t5624". I0310 Assembling source pass 1. I0330 Assembling source pass 2 - final. I0470 Assembling program "t5624". "t5624.htm"{58} I0510 Assembling program pass 1. "t5624.htm"{58} I0530 Assembling program pass 2 - final. "t5624.htm"{58} I0660 16bit TINY BIN file "t5624.bin" created, size=479. "t5624.htm"{134} I0650 Program "t5624" assembled in 2 passes with errorlevel 0. "t5624.htm"{134} I0750 Source "t5624" (152 lines) assembled in 2 passes with errorlevel 0. I0860 Listing file "t5624.htm.lst" created, size=5149. I0990 EuroAssembler terminated with errorlevel 0.`

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