| Index | Manual | Download | Source | Macros | Embedded word Case ins.
Sitemap | Links | Forum | Tests | Projects

# Test t5797: Machine instructions VPCMPEQB VPCMPEQW VPCMPEQD VPCMPEQQ VPCMPLTD

Tested procedures
  IiyVPCMPEQB IiyVPCMPEQW IiyVPCMPEQD IiyVPCMPEQQ IiyVPCMPLTD

Source & expected listing t5797.htm.lst
  `| | EUROASM LIST=ON,DUMP=ON,DUMPWIDTH=30,CPU=X64,SIMD=AVX512,EVEX=ON,MVEX=ON | |t5797 PROGRAM FORMAT=BIN, LISTMAP=OFF, LISTGLOBALS=OFF |[Mode64] |[Mode64] SEGMENT WIDTH=64,PURPOSE=CODE |00000000:C5E974CB | VPCMPEQB XMM1,XMM2,XMM3 |00000004:C5ED74CB | VPCMPEQB YMM1,YMM2,YMM3 |00000008:C4E16974CB | VPCMPEQB XMM1,XMM2,XMM3,PREFIX=VEX3 |0000000D:C4E16D74CB | VPCMPEQB YMM1,YMM2,YMM3,PREFIX=VEX3 |00000012:C5E9744D40 | VPCMPEQB XMM1,XMM2,[RBP+40h] |00000017:C5ED744D40 | VPCMPEQB YMM1,YMM2,[RBP+40h] |0000001C:C4E169744D40 | VPCMPEQB XMM1,XMM2,[RBP+40h],PREFIX=VEX3 |00000022:C4E16D744D40 | VPCMPEQB YMM1,YMM2,[RBP+40h],PREFIX=VEX3 |00000028:62F16D0C74CB | VPCMPEQB K1,XMM2,XMM3,MASK=K4 |0000002E:62F16D2C74CB | VPCMPEQB K1,YMM2,YMM3,MASK=K4 |00000034:62F16D4C74CB | VPCMPEQB K1,ZMM2,ZMM3,MASK=K4 |0000003A:62F36D0C3FCB00 | VPCMPEQB K1,XMM2,XMM3,MASK=K4,CODE=LONG |00000041:62F36D2C3FCB00 | VPCMPEQB K1,YMM2,YMM3,MASK=K4,CODE=LONG |00000048:62F36D4C3FCB00 | VPCMPEQB K1,ZMM2,ZMM3,MASK=K4,CODE=LONG |0000004F:62F16D0C744D04<4 | VPCMPEQB K1,XMM2,[RBP+40h],MASK=K4 |00000056:62F16D2C744D02<5 | VPCMPEQB K1,YMM2,[RBP+40h],MASK=K4 |0000005D:62F16D4C744D01<6 | VPCMPEQB K1,ZMM2,[RBP+40h],MASK=K4 |00000064:62F36D0C3F4D04<400 | VPCMPEQB K1,XMM2,[RBP+40h],MASK=K4,CODE=LONG |0000006C:62F36D2C3F4D02<500 | VPCMPEQB K1,YMM2,[RBP+40h],MASK=K4,CODE=LONG |00000074:62F36D4C3F4D01<600 | VPCMPEQB K1,ZMM2,[RBP+40h],MASK=K4,CODE=LONG |0000007C:C5E975CB | VPCMPEQW XMM1,XMM2,XMM3 |00000080:C5ED75CB | VPCMPEQW YMM1,YMM2,YMM3 |00000084:C4E16975CB | VPCMPEQW XMM1,XMM2,XMM3,PREFIX=VEX3 |00000089:C4E16D75CB | VPCMPEQW YMM1,YMM2,YMM3,PREFIX=VEX3 |0000008E:C5E9754D40 | VPCMPEQW XMM1,XMM2,[RBP+40h] |00000093:C5ED754D40 | VPCMPEQW YMM1,YMM2,[RBP+40h] |00000098:C4E169754D40 | VPCMPEQW XMM1,XMM2,[RBP+40h],PREFIX=VEX3 |0000009E:C4E16D754D40 | VPCMPEQW YMM1,YMM2,[RBP+40h],PREFIX=VEX3 |000000A4:62F16D0C75CB | VPCMPEQW K1,XMM2,XMM3,MASK=K4 |000000AA:62F16D2C75CB | VPCMPEQW K1,YMM2,YMM3,MASK=K4 |000000B0:62F16D4C75CB | VPCMPEQW K1,ZMM2,ZMM3,MASK=K4 |000000B6:62F3ED0C3FCB00 | VPCMPEQW K1,XMM2,XMM3,MASK=K4,CODE=LONG |000000BD:62F3ED2C3FCB00 | VPCMPEQW K1,YMM2,YMM3,MASK=K4,CODE=LONG |000000C4:62F3ED4C3FCB00 | VPCMPEQW K1,ZMM2,ZMM3,MASK=K4,CODE=LONG |000000CB:62F16D0C754D04<4 | VPCMPEQW K1,XMM2,[RBP+40h],MASK=K4 |000000D2:62F16D2C754D02<5 | VPCMPEQW K1,YMM2,[RBP+40h],MASK=K4 |000000D9:62F16D4C754D01<6 | VPCMPEQW K1,ZMM2,[RBP+40h],MASK=K4 |000000E0:62F3ED0C3F4D04<400 | VPCMPEQW K1,XMM2,[RBP+40h],MASK=K4,CODE=LONG |000000E8:62F3ED2C3F4D02<500 | VPCMPEQW K1,YMM2,[RBP+40h],MASK=K4,CODE=LONG |000000F0:62F3ED4C3F4D01<600 | VPCMPEQW K1,ZMM2,[RBP+40h],MASK=K4,CODE=LONG |000000F8:C5E976CB | VPCMPEQD XMM1,XMM2,XMM3 |000000FC:C5ED76CB | VPCMPEQD YMM1,YMM2,YMM3 |00000100:C4E16976CB | VPCMPEQD XMM1,XMM2,XMM3,PREFIX=VEX3 |00000105:C4E16D76CB | VPCMPEQD YMM1,YMM2,YMM3,PREFIX=VEX3 |0000010A:C5E9764D40 | VPCMPEQD XMM1,XMM2,[RBP+40h] |0000010F:C5ED764D40 | VPCMPEQD YMM1,YMM2,[RBP+40h] |00000114:C4E169764D40 | VPCMPEQD XMM1,XMM2,[RBP+40h],PREFIX=VEX3 |0000011A:C4E16D764D40 | VPCMPEQD YMM1,YMM2,[RBP+40h],PREFIX=VEX3 |00000120:62F16D0C76CB | VPCMPEQD K1,XMM2,XMM3,MASK=K4 |00000126:62F16D2C76CB | VPCMPEQD K1,YMM2,YMM3,MASK=K4 |0000012C:62F16D4C76CB | VPCMPEQD K1,ZMM2,ZMM3,MASK=K4 |00000132:62F36D0C1FCB00 | VPCMPEQD K1,XMM2,XMM3,MASK=K4,CODE=LONG |00000139:62F36D2C1FCB00 | VPCMPEQD K1,YMM2,YMM3,MASK=K4,CODE=LONG |00000140:62F36D4C1FCB00 | VPCMPEQD K1,ZMM2,ZMM3,MASK=K4,CODE=LONG |00000147:62F1692C76CB | VPCMPEQD K1,ZMM2,ZMM3,MASK=K4,EH=0,OPER=2 ; MVEX swizzle {badc}. |0000014D:62F16D0C764D04<4 | VPCMPEQD K1,XMM2,[RBP+40h],MASK=K4 |00000154:62F16D2C764D02<5 | VPCMPEQD K1,YMM2,[RBP+40h],MASK=K4 |0000015B:62F16D4C764D01<6 | VPCMPEQD K1,ZMM2,[RBP+40h],MASK=K4 |00000162:62F16D1C764D10<2 | VPCMPEQD K1,XMM2,[RBP+40h],MASK=K4,BCST=ON |00000169:62F16D3C764D10<2 | VPCMPEQD K1,YMM2,[RBP+40h],MASK=K4,BCST=ON |00000170:62F16D5C764D10<2 | VPCMPEQD K1,ZMM2,[RBP+40h],MASK=K4,BCST=ON |00000177:62F1690C764D01<6 | VPCMPEQD K1,ZMM2,[RBP+40h],MASK=K4,PREFIX=MVEX,OPER=0 ; {16to16}. |0000017E:62F1691C764D10<2 | VPCMPEQD K1,ZMM2,[RBP+40h],MASK=K4,PREFIX=MVEX,OPER=1 ; {1to16}. |00000185:62F1692C764D04<4 | VPCMPEQD K1,ZMM2,[RBP+40h],MASK=K4,PREFIX=MVEX,OPER=2 ; {4to16}. |0000018C:62F36D0C1F4D04<400 | VPCMPEQD K1,XMM2,[RBP+40h],MASK=K4,CODE=LONG |00000194:62F36D2C1F4D02<500 | VPCMPEQD K1,YMM2,[RBP+40h],MASK=K4,CODE=LONG |0000019C:62F36D4C1F4D01<600 | VPCMPEQD K1,ZMM2,[RBP+40h],MASK=K4,CODE=LONG |000001A4:62F36D1C1F4D10<200 | VPCMPEQD K1,XMM2,[RBP+40h],MASK=K4,CODE=LONG,BCST=ON |000001AC:62F36D3C1F4D10<200 | VPCMPEQD K1,YMM2,[RBP+40h],MASK=K4,CODE=LONG,BCST=ON |000001B4:62F36D5C1F4D10<200 | VPCMPEQD K1,ZMM2,[RBP+40h],MASK=K4,CODE=LONG,BCST=ON |000001BC:C4E26929CB | VPCMPEQQ XMM1,XMM2,XMM3 |000001C1:C4E26D29CB | VPCMPEQQ YMM1,YMM2,YMM3 |000001C6:C4E269294D40 | VPCMPEQQ XMM1,XMM2,[RBP+40h] |000001CC:C4E26D294D40 | VPCMPEQQ YMM1,YMM2,[RBP+40h] |000001D2:62F2ED0C29CB | VPCMPEQQ K1,XMM2,XMM3,MASK=K4 |000001D8:62F2ED2C29CB | VPCMPEQQ K1,YMM2,YMM3,MASK=K4 |000001DE:62F2ED4C29CB | VPCMPEQQ K1,ZMM2,ZMM3,MASK=K4 |000001E4:62F3ED0C1FCB00 | VPCMPEQQ K1,XMM2,XMM3,MASK=K4,CODE=LONG |000001EB:62F3ED2C1FCB00 | VPCMPEQQ K1,YMM2,YMM3,MASK=K4,CODE=LONG |000001F2:62F3ED4C1FCB00 | VPCMPEQQ K1,ZMM2,ZMM3,MASK=K4,CODE=LONG |000001F9:62F2ED0C294D04<4 | VPCMPEQQ K1,XMM2,[RBP+40h],MASK=K4 |00000200:62F2ED2C294D02<5 | VPCMPEQQ K1,YMM2,[RBP+40h],MASK=K4 |00000207:62F2ED4C294D01<6 | VPCMPEQQ K1,ZMM2,[RBP+40h],MASK=K4 |0000020E:62F2ED1C294D08<3 | VPCMPEQQ K1,XMM2,[RBP+40h],MASK=K4,BCST=ON |00000215:62F2ED3C294D08<3 | VPCMPEQQ K1,YMM2,[RBP+40h],MASK=K4,BCST=ON |0000021C:62F2ED5C294D08<3 | VPCMPEQQ K1,ZMM2,[RBP+40h],MASK=K4,BCST=ON |00000223:62F3ED0C1F4D04<400 | VPCMPEQQ K1,XMM2,[RBP+40h],MASK=K4,CODE=LONG |0000022B:62F3ED2C1F4D02<500 | VPCMPEQQ K1,YMM2,[RBP+40h],MASK=K4,CODE=LONG |00000233:62F3ED4C1F4D01<600 | VPCMPEQQ K1,ZMM2,[RBP+40h],MASK=K4,CODE=LONG |0000023B:62F3ED1C1F4D08<300 | VPCMPEQQ K1,XMM2,[RBP+40h],MASK=K4,CODE=LONG,BCST=ON |00000243:62F3ED3C1F4D08<300 | VPCMPEQQ K1,YMM2,[RBP+40h],MASK=K4,CODE=LONG,BCST=ON |0000024B:62F3ED5C1F4D08<300 | VPCMPEQQ K1,ZMM2,[RBP+40h],MASK=K4,CODE=LONG,BCST=ON |00000253:62F36D4C1FCB01 | VPCMPLTD K1,ZMM2,ZMM3,MASK=K4 |0000025A:62F36D4C1FCB01 | VPCMPLTD K1,ZMM2,ZMM3,MASK=K4,CODE=LONG |00000261:62F2694C74CB | VPCMPLTD K1,ZMM2,ZMM3,MASK=K4,CODE=SHORT,PREFIX=MVEX,OPER=4 ; {aaaa}. |00000267:62F2692C74CB | VPCMPLTD K1,ZMM2,ZMM3,MASK=K4,EH=0,OPER=2 ; MVEX swizzle {badc}. |0000026D:62F36D4C1F4D01<601 | VPCMPLTD K1,ZMM2,[RBP+40h],MASK=K4 |00000275:62F36D5C1F4D10<201 | VPCMPLTD K1,ZMM2,[RBP+40h],MASK=K4,BCST=ON |0000027D:62F2690C744D01<6 | VPCMPLTD K1,ZMM2,[RBP+40h],MASK=K4,PREFIX=MVEX,OPER=0 ; MVEX {16to16}. |00000284:62F2691C744D10<2 | VPCMPLTD K1,ZMM2,[RBP+40h],MASK=K4,PREFIX=MVEX,OPER=1 ; MVEX {1to16}. |0000028B:62F2692C744D04<4 | VPCMPLTD K1,ZMM2,[RBP+40h],MASK=K4,PREFIX=MVEX,OPER=2 ; MVEX {4to16}. | |ENDPROGRAM t5797`

Expected messages t5797.out
  `I0180 Assembling source file "t5797.htm". I0270 Assembling source "t5797". I0310 Assembling source pass 1. I0330 Assembling source pass 2 - final. I0470 Assembling program "t5797". "t5797.htm"{61} I0510 Assembling program pass 1. "t5797.htm"{61} I0530 Assembling program pass 2 - final. "t5797.htm"{61} I0660 16bit TINY BIN file "t5797.bin" created, size=658. "t5797.htm"{164} I0650 Program "t5797" assembled in 2 passes with errorlevel 0. "t5797.htm"{164} I0750 Source "t5797" (182 lines) assembled in 2 passes with errorlevel 0. I0860 Listing file "t5797.htm.lst" created, size=7558. I0990 EuroAssembler terminated with errorlevel 0.`

▲Back to the top▲