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# Test t5264: Machine instructions VCMPPS VCMPccPS

Tested procedures
  IizVCMPPS

Source & expected listing t5264.htm.lst
  `| | EUROASM LIST=ON, DUMP=ON, DUMPWIDTH=34, DUMPALL=OFF, CPU=X64, SIMD=AVX512, EVEX=ON, MVEX=ON | |t5264 PROGRAM FORMAT=BIN, LISTMAP=OFF, LISTGLOBALS=OFF |[Mode64] |[Mode64] SEGMENT WIDTH=64,PURPOSE=CODE |00000000:C5E8C2CB04 | VCMPPS XMM1,XMM2,XMM3,4 |00000005:C5ECC2CB04 | VCMPPS YMM1,YMM2,YMM3,4 |0000000A:62F16C0DC2CB04 | VCMPPS K1,XMM2,XMM3,4,MASK=K5 |00000011:62F16C28C2CB04 | VCMPPS K1,YMM2,YMM3,4 |00000018:62F16C4DC2CB04 | VCMPPS K1,ZMM2,ZMM3,4,MASK=K5 |0000001F:62F16C5DC2CB04 | VCMPPS K1,ZMM2,ZMM3,4,MASK=K5,SAE=ON |00000026:C5E8C24D4004 | VCMPPS XMM1,XMM2,[RBP+40h],4 |0000002C:C5ECC24D4004 | VCMPPS YMM1,YMM2,[RBP+40h],4 |00000032:62F16C08C24D04<404 | VCMPPS K1,XMM2,[RBP+40h],4 |0000003A:62F16C18C24D10<204 | VCMPPS K1,XMM2,[RBP+40h],4,BCST=ON |00000042:62F16C28C24D02<504 | VCMPPS K1,YMM2,[RBP+40h],4 |0000004A:62F16C38C24D10<204 | VCMPPS K1,YMM2,[RBP+40h],4,BCST=ON |00000052:62F16C48C24D01<604 | VCMPPS K1,ZMM2,[RBP+40h],4 |0000005A:62F16C58C24D10<204 | VCMPPS K1,ZMM2,[RBP+40h],4,BCST=ON |00000062:62F16808C2CB04 | VCMPPS K1,ZMM2,ZMM3,4,PREFIX=MVEX |00000069:62F16808C2CB04 | VCMPPS K1,ZMM2,ZMM3,4,EH=OFF,OPER=0 ; No swizzle. |00000070:62F16878C2CB04 | VCMPPS K1,ZMM2,ZMM3,4,EH=OFF,OPER=7 ; {dddd}. |00000077:62F16848C2CB04 | VCMPPS K1,ZMM2,ZMM3,4,PREFIX=MVEX,SAE=ON ; {sae}. |0000007E:62F16848C2CB04 | VCMPPS K1,ZMM2,ZMM3,4,PREFIX=MVEX,OPER=4 ; {sae}. |00000085:62F16808C24D01<604 | VCMPPS K1,ZMM2,[RBP+40h],4,PREFIX=MVEX,OPER=0 ; {16to16}. |0000008D:62F16818C24D10<204 | VCMPPS K1,ZMM2,[RBP+40h],4,PREFIX=MVEX,OPER=1 ; {1to16}. |00000095:62F16828C24D04<404 | VCMPPS K1,ZMM2,[RBP+40h],4,PREFIX=MVEX,OPER=2 ; {4to16}. |0000009D:62F16838C24D02<504 | VCMPPS K1,ZMM2,[RBP+40h],4,PREFIX=MVEX,OPER=3 ; {float16}. |000000A5:62F16848C24D04<404 | VCMPPS K1,ZMM2,[RBP+40h],4,PREFIX=MVEX,OPER=4 ; {uint8}. |000000AD:62F16868C24D02<504 | VCMPPS K1,ZMM2,[RBP+40h],4,PREFIX=MVEX,OPER=6 ; {uint16}. |000000B5:62F16878C24D02<504 | VCMPPS K1,ZMM2,[RBP+40h],4,PREFIX=MVEX,OPER=7 ; {sint16}. |000000BD:C5E8C2CB00 | VCMPEQPS XMM1,XMM2,XMM3 |000000C2:C5E8C2CB01 | VCMPLTPS XMM1,XMM2,XMM3 |000000C7:C5E8C2CB02 | VCMPLEPS XMM1,XMM2,XMM3 |000000CC:C5E8C2CB03 | VCMPUNORDPS XMM1,XMM2,XMM3 |000000D1:C5E8C2CB04 | VCMPNEQPS XMM1,XMM2,XMM3 |000000D6:C5E8C2CB05 | VCMPNLTPS XMM1,XMM2,XMM3 |000000DB:C5E8C2CB06 | VCMPNLEPS XMM1,XMM2,XMM3 |000000E0:C5E8C2CB07 | VCMPORDPS XMM1,XMM2,XMM3 |000000E5:C5E8C2CB09 | VCMPNGEPS XMM1,XMM2,XMM3 |000000EA:C5E8C2CB0A | VCMPNGTPS XMM1,XMM2,XMM3 |000000EF:C5E8C2CB0B | VCMPFALSEPS XMM1,XMM2,XMM3 |000000F4:C5E8C2CB0D | VCMPGEPS XMM1,XMM2,XMM3 |000000F9:C5E8C2CB0E | VCMPGTPS XMM1,XMM2,XMM3 |000000FE:C5E8C2CB0F | VCMPTRUEPS XMM1,XMM2,XMM3 |00000103:C5E8C2CB00 | VCMPEQ_OQPS XMM1,XMM2,XMM3 |00000108:C5E8C2CB01 | VCMPLT_OSPS XMM1,XMM2,XMM3 |0000010D:C5E8C2CB02 | VCMPLE_OSPS XMM1,XMM2,XMM3 |00000112:C5E8C2CB03 | VCMPUNORD_QPS XMM1,XMM2,XMM3 |00000117:C5E8C2CB04 | VCMPNEQ_UQPS XMM1,XMM2,XMM3 |0000011C:C5E8C2CB05 | VCMPNLT_USPS XMM1,XMM2,XMM3 |00000121:C5E8C2CB06 | VCMPNLE_USPS XMM1,XMM2,XMM3 |00000126:C5E8C2CB07 | VCMPORD_QPS XMM1,XMM2,XMM3 |0000012B:C5E8C2CB08 | VCMPEQ_UQPS XMM1,XMM2,XMM3 |00000130:C5E8C2CB09 | VCMPNGE_USPS XMM1,XMM2,XMM3 |00000135:C5E8C2CB0A | VCMPNGT_USPS XMM1,XMM2,XMM3 |0000013A:C5E8C2CB0B | VCMPFALSE_OQPS XMM1,XMM2,XMM3 |0000013F:C5E8C2CB0C | VCMPNEQ_OQPS XMM1,XMM2,XMM3 |00000144:C5E8C2CB0D | VCMPGE_OSPS XMM1,XMM2,XMM3 |00000149:C5E8C2CB0E | VCMPGT_OSPS XMM1,XMM2,XMM3 |0000014E:C5E8C2CB0F | VCMPTRUE_UQPS XMM1,XMM2,XMM3 |00000153:C5E8C2CB10 | VCMPEQ_OSPS XMM1,XMM2,XMM3 |00000158:C5E8C2CB11 | VCMPLT_OQPS XMM1,XMM2,XMM3 |0000015D:C5E8C2CB12 | VCMPLE_OQPS XMM1,XMM2,XMM3 |00000162:C5E8C2CB13 | VCMPUNORD_SPS XMM1,XMM2,XMM3 |00000167:C5E8C2CB14 | VCMPNEQ_USPS XMM1,XMM2,XMM3 |0000016C:C5E8C2CB15 | VCMPNLT_UQPS XMM1,XMM2,XMM3 |00000171:C5E8C2CB16 | VCMPNLE_UQPS XMM1,XMM2,XMM3 |00000176:C5E8C2CB17 | VCMPORD_SPS XMM1,XMM2,XMM3 |0000017B:C5E8C2CB18 | VCMPEQ_USPS XMM1,XMM2,XMM3 |00000180:C5E8C2CB19 | VCMPNGE_UQPS XMM1,XMM2,XMM3 |00000185:C5E8C2CB1A | VCMPNGT_UQPS XMM1,XMM2,XMM3 |0000018A:C5E8C2CB1B | VCMPFALSE_OSPS XMM1,XMM2,XMM3 |0000018F:C5E8C2CB1C | VCMPNEQ_OSPS XMM1,XMM2,XMM3 |00000194:C5E8C2CB1D | VCMPGE_OQPS XMM1,XMM2,XMM3 |00000199:C5E8C2CB1E | VCMPGT_OQPS XMM1,XMM2,XMM3 |0000019E:C5E8C2CB1F | VCMPTRUE_USPS XMM1,XMM2,XMM3 | |ENDPROGRAM t5264`

Expected messages t5264.out
  `I0180 Assembling source file "t5264.htm". I0270 Assembling source "t5264". I0310 Assembling source pass 1. I0330 Assembling source pass 2 - final. I0470 Assembling program "t5264". "t5264.htm"{49} I0510 Assembling program pass 1. "t5264.htm"{49} I0530 Assembling program pass 2 - final. "t5264.htm"{49} I0660 16bit TINY BIN file "t5264.bin" created, size=419. "t5264.htm"{123} I0650 Program "t5264" assembled in 2 passes with errorlevel 0. "t5264.htm"{123} I0750 Source "t5264" (141 lines) assembled in 2 passes with errorlevel 0. I0860 Listing file "t5264.htm.lst" created, size=5221. I0990 EuroAssembler terminated with errorlevel 0.`

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