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# Test t5230: Machine instructions VCVTDQ2PD VCVTUDQ2PD VCVTQQ2PD VCVTUQQ2PD VCVTPS2PD VCVTPS2PH

Tested procedures
  IizVCVTDQ2PD IizVCVTUDQ2PD IizVCVTQQ2PD IizVCVTUQQ2PD IizVCVTPS2PD IizVCVTPS2PH

Source & expected listing t5230.htm.lst
  `| | EUROASM LIST=ON, DUMP=ON, DUMPWIDTH=28, CPU=X64, SIMD=AVX512, MVEX=ON, EVEX=ON | |t5230 PROGRAM FORMAT=BIN, LISTMAP=OFF, LISTGLOBALS=OFF |[Mode64] |[Mode64] SEGMENT WIDTH=64,PURPOSE=CODE |00000000:C5FAE64D40 | VCVTDQ2PD XMM1,[RBP+40h] |00000005:62F17E18E64D10<2 | VCVTDQ2PD XMM1,[RBP+40h],BCST=ON |0000000C:C5FEE6CA | VCVTDQ2PD YMM1,XMM2 |00000010:C5FEE64D40 | VCVTDQ2PD YMM1,[RBP+40h] |00000015:62F17E38E64D10<2 | VCVTDQ2PD YMM1,[RBP+40h],BCST=ON |0000001C:C5FAE6CA | VCVTDQ2PD XMM1,XMM2 |00000020:62F17E48E6CA | VCVTDQ2PD ZMM1,YMM2 |00000026:62F17E08E6CA | VCVTDQ2PD XMM1,XMM2,PREFIX=EVEX |0000002C:62F17E48E6CA | VCVTDQ2PD ZMM1,YMM2,PREFIX=EVEX |00000032:62F17E4BE6CA | VCVTDQ2PD ZMM1,YMM2,MASK=K3 |00000038:62F17ECBE6CA | VCVTDQ2PD ZMM1,YMM2,MASK=K3,ZEROING=ON |0000003E:62F17E48E64D02<5 | VCVTDQ2PD ZMM1,[RBP+40h] |00000045:62F17A08E64D02<5 | VCVTDQ2PD ZMM1,[RBP+40h],PREFIX=MVEX |0000004C:62F17E58E64D10<2 | VCVTDQ2PD ZMM1,[RBP+40h],BCST=ON |00000053:62F17A0BE6CA | VCVTDQ2PD ZMM1,ZMM2,MASK=K3 |00000059:62F17A88E6CA | VCVTDQ2PD ZMM1,ZMM2,EH=ON |0000005F:62F17E087ACA | VCVTUDQ2PD XMM1,XMM2 |00000065:62F17E087A4D08<3 | VCVTUDQ2PD XMM1,[RBP+40h] |0000006C:62F17E287ACA | VCVTUDQ2PD YMM1,XMM2 |00000072:62F17E287A4D04<4 | VCVTUDQ2PD YMM1,[RBP+40h] |00000079:62F17E487ACA | VCVTUDQ2PD ZMM1,YMM2 |0000007F:62F17E4B7ACA | VCVTUDQ2PD ZMM1,YMM2,MASK=K3 |00000085:62F17E487A4D02<5 | VCVTUDQ2PD ZMM1,[RBP+40h] |0000008C:62F17E587A4D10<2 | VCVTUDQ2PD ZMM1,[RBP+40h],BCST=ON |00000093:62F17A087ACA | VCVTUDQ2PD ZMM1,ZMM2 |00000099:62F17A887ACA | VCVTUDQ2PD ZMM1,ZMM2,EH=ON |0000009F:62F17A087A4D02<5 | VCVTUDQ2PD ZMM1,[RBP+40h],PREFIX=MVEX |000000A6:62F17A0B7A4D02<5 | VCVTUDQ2PD ZMM1,[RBP+40h],PREFIX=MVEX,MASK=K3 |000000AD:62F17A287A4D04<4 | VCVTUDQ2PD ZMM1,[RBP+40h],PREFIX=MVEX,OPER=2 ; Broadcast {4to8} |000000B4:62F1FE08E6CA | VCVTQQ2PD XMM1,XMM2 |000000BA:62F1FE08E64D04<4 | VCVTQQ2PD XMM1,[RBP+40h] |000000C1:62F1FE28E6CA | VCVTQQ2PD YMM1,YMM2 |000000C7:62F1FE28E64D02<5 | VCVTQQ2PD YMM1,[RBP+40h] |000000CE:62F1FE38E64D08<3 | VCVTQQ2PD YMM1,[RBP+40h],BCST=ON |000000D5:62F1FE48E6CA | VCVTQQ2PD ZMM1,ZMM2 |000000DB:62F1FE4BE6CA | VCVTQQ2PD ZMM1,ZMM2,MASK=K3 |000000E1:62F1FEDBE6CA | VCVTQQ2PD ZMM1,ZMM2,MASK=K3,ROUND=UP,ZEROING=ON |000000E7:62F1FE48E64D01<6 | VCVTQQ2PD ZMM1,[RBP+40h] |000000EE:62F1FE58E64D08<3 | VCVTQQ2PD ZMM1,[RBP+40h],BCST=ON |000000F5:62F1FE087ACA | VCVTUQQ2PD XMM1,XMM2 |000000FB:62F1FE0B7ACA | VCVTUQQ2PD XMM1,XMM2,MASK=K3 |00000101:62F1FE087A4D04<4 | VCVTUQQ2PD XMM1,[RBP+40h] |00000108:62F1FE9B7A4D08<3 | VCVTUQQ2PD XMM1,[RBP+40h],MASK=K3,ZEROING=ON,BCST=ON |0000010F:62F1FE287ACA | VCVTUQQ2PD YMM1,YMM2 |00000115:62F1FEAB7ACA | VCVTUQQ2PD YMM1,YMM2,MASK=K3,ZEROING=ON |0000011B:62F1FE287A4D02<5 | VCVTUQQ2PD YMM1,[RBP+40h] |00000122:62F1FE387A4D08<3 | VCVTUQQ2PD YMM1,[RBP+40h],BCST=ON |00000129:62F1FE487ACA | VCVTUQQ2PD ZMM1,ZMM2 |0000012F:62F1FE9B7ACA | VCVTUQQ2PD ZMM1,ZMM2,MASK=K3,ZEROING=ON,ROUND=NEAR |00000135:62F1FE487A4D01<6 | VCVTUQQ2PD ZMM1,[RBP+40h] |0000013C:62F1FEDB7A4D08<3 | VCVTUQQ2PD ZMM1,[RBP+40h],MASK=K3,ZEROING=ON,BCST=ON |00000143:C5F85ACA | VCVTPS2PD XMM1,XMM2 |00000147:C5F85A4D40 | VCVTPS2PD XMM1,[RBP+40h] |0000014C:62F17CAB5ACA | VCVTPS2PD YMM1,XMM2,MASK=K3,ZEROING=ON |00000152:C5FC5A4D40 | VCVTPS2PD YMM1,[RBP+40h] |00000157:62F17C485ACA | VCVTPS2PD ZMM1,YMM2 |0000015D:62F17C4A5A4D02<5 | VCVTPS2PD ZMM1,[RBP+40h],MASK=K2 |00000164:62F178085A4D02<5 | VCVTPS2PD ZMM1,[RBP+40h],PREFIX=MVEX |0000016B:62F178385ACA | VCVTPS2PD ZMM1,ZMM2,OPER=3 ; Cross-product swizzle. |00000171:62F178885ACA | VCVTPS2PD ZMM1,ZMM2,EH=1 | | EUROASM SPEC=ENABLE |00000177:C4E3791DD100 | VCVTPS2PH XMM1,XMM2,0 ; Rounding to nearest even. |0000017D:C4E37D1DD101 | VCVTPS2PH XMM1,YMM2,1 ; Rounding down. |00000183:62F37D2B1DD104 | VCVTPS2PH XMM1,YMM2,MASK=K3,4 ; Rounding by MXCSR.RC. |0000018A:C4E3791D554003 | VCVTPS2PH [RBP+40h],XMM2,3 ; Truncate. |00000191:C4E3791D554003 | VCVTPS2PH [RBP+40h],XMM2,3 |00000198:62F37D5B1DD100 | VCVTPS2PH YMM1,ZMM2,0,MASK=K3,SAE=ON |0000019F:62F37DAB1D4D04<4~| VCVTPS2PH [RBP+40h],YMM1,0,MASK=K3,ZEROING=ON | |ENDPROGRAM t5230`

Expected messages t5230.out
  `I0180 Assembling source file "t5230.htm". I0270 Assembling source "t5230". I0310 Assembling source pass 1. I0330 Assembling source pass 2 - final. I0470 Assembling program "t5230". "t5230.htm"{64} I0510 Assembling program pass 1. "t5230.htm"{64} I0530 Assembling program pass 2 - final. "t5230.htm"{64} I0660 16bit TINY BIN file "t5230.bin" created, size=423. "t5230.htm"{134} I0650 Program "t5230" assembled in 2 passes with errorlevel 0. "t5230.htm"{134} I0750 Source "t5230" (152 lines) assembled in 2 passes with errorlevel 0. I0860 Listing file "t5230.htm.lst" created, size=4469. I0990 EuroAssembler terminated with errorlevel 0.`

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